link to page 17 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 AD7940SPECIFICATIONS1 VDD = 2.50 V to 5.5 V, fSCLK = 2.5 MHz, fSAMPLE = 100 kSPS, unless otherwise noted; TA = TMIN to TMAX, unless otherwise noted. Table 2. ParameterB Version1UnitTest Conditions/Comments DYNAMIC PERFORMANCE f = 10 kHz sine wave IN Signal-to-Noise + Distortion (SINAD)2 81 dB min Total Harmonic Distortion (THD)2 −98 dB typ Peak Harmonic or Spurious Noise (SFDR)2 −95 dB typ Intermodulation Distortion (IMD)2 Second-Order Terms −94 dB typ Third-Order Terms −100 dB typ Aperture Delay 20 ns max Aperture Jitter 30 ps typ Full Power Bandwidth 7 MHz typ @ −3 dB 2 MHz typ @ −0.1 dB DC ACCURACY Resolution 14 Bits min V = 2.5 V to 4.096 V DD 13 Bits min V > 4.096 V DD Integral Nonlinearity2 ±1 LSB max V = 2.5 V to 4.096 V DD ±2 LSB max V > 4.096 V DD Offset Error2 ±6 LSB max Gain Error2 ±8 LSB max ANALOG INPUT Input Voltage Ranges 0 to V V DD DC Leakage Current ±0.3 µA max Input Capacitance 30 pF typ LOGIC INPUTS Input High Voltage, V 2.4 V min INH Input Low Voltage, V 0.4 V max V = 3 V INL DD 0.8 V max V = 5 V DD Input Current, I ±0.3 µA max Typically 10 nA, V = 0 V or V IN IN DD Input Capacitance, C 2, 3 10 pF max IN LOGIC OUTPUTS Output High Voltage, V V – 0.2 V min I = 200 µA; V = 2.50 V to 5.25 V OH DD SOURCE DD Output Low Voltage, V 0.4 V max I = 200 µA OL SINK Floating-State Leakage Current ±0.3 µA max Floating-State Output Capacitance2, 3 10 pF max Output Coding Straight (Natural) Binary CONVERSION RATE Conversion Time 8 µs max 16 SCLK cycles Track-and-Hold Acquisition Time 500 ns max Full-scale step input 400 ns max Sine wave input ≤ 10 kHz Throughput Rate 100 kSPS max See the Serial Interface section POWER REQUIREMENTS V 2.50/5.5 V min/V max DD I Digital I/P = 0 V or V DD S DD Normal Mode (Static) 5.2 mA max V = 5.5 V; SCLK on or off DD 2 mA max V = 3.6 V; SCLK on or off DD Normal Mode (Operational) 4.8 mA max V = 5.5 V; f = 100 kSPS; 3.3 mA typ DD SAMPLE 1.9 mA max V = 3.6 V; f = 100 kSPS; 1.29 mA typ DD SAMPLE Full Power-Down Mode 0.5 µA max SCLK on or off. V = 5.5 V DD 0.3 µA max SCLK on or off. V = 3.6 V DD Rev. A | Page 3 of 20 Document Outline Table of Contents Specifications1F Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Terminology Typical Performance Characteristics Circuit Information Converter Operation Analog Input ADC Transfer Function Typical Connection Diagram Digital Inputs Modes of Operation Normal Mode Power-Down Mode Power vs. Throughput Rate Serial Interface Microprocessor Interfacing AD7940 to TMS320C541 AD7940 to ADSP-218x AD7940 to DSP563xx Application Hints Grounding and Layout Evaluating the AD7940 Performance Outline Dimensions Ordering Guide