Datasheet AD7667 (Analog Devices) - 4

link to page 4 link to page 5 link to page 5 link to page 5 link to page 5
AD7667 SPECIFICATIONS Table 2. –40°C to +85°C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted. Parameter Conditions Min Typ Max Unit
RESOLUTION 16 Bits ANALOG INPUT Voltage Range VIN – VINGND 0 VREF V Operating Input Voltage VIN –0.1 +3 V VINGND –0.1 +0.5 V Analog Input CMRR fIN = 100 kHz 64 dB Input Current 1 MSPS Throughput 19 µA Input Impedance1 THROUGHPUT SPEED Complete Cycle In Warp Mode 1 µs Throughput Rate In Warp Mode 1 1000 kSPS Time between Conversions In Warp Mode 1 ms Complete Cycle In Normal Mode 1.25 µs Throughput Rate In Normal Mode 0 800 kSPS Complete Cycle In Impulse Mode 1.5 µs Throughput Rate In Impulse Mode 0 666 kSPS DC ACCURACY Integral Linearity Error –2.0 +2.0 LSB2 No Missing Codes 16 Bits Differential Linearity Error –1.0 +1.5 LSB Transition Noise 0.7 LSB Unipolar Zero Error, T 3 MIN to TMAX ±25 LSB Unipolar Zero Error Temperature Drift ±1.0 ppm/°C Full-Scale Error, T 3 MIN to TMAX REF = 2.5 V ±0.08 % of FSR Full-Scale Error Temperature Drift ±1.0 ppm/°C Power Supply Sensitivity AVDD = 5 V ± 5% ±2 LSB AC ACCURACY Signal-to-Noise fIN = 20 kHz 88 89.2 dB4 Spurious Free Dynamic Range fIN = 20 kHz 96 105 dB Total Harmonic Distortion fIN = 20 kHz –104 –96 dB Signal-to-(Noise + Distortion) fIN = 20 kHz 88 89 dB –60 dB Input, fIN = 20 kHz 30 dB –3 dB Input Bandwidth 13 MHz SAMPLING DYNAMICS Aperture Delay 2 ns Aperture Jitter 5 ps rms Transient Response Full-Scale Step 250 ns REFERENCE Internal Reference Voltage VREF @ 25°C 2.493 2.5 2.507 V Internal Reference Temperature Drift –40°C to +85°C ±3 ±15 ppm/°C Output Voltage Hysteresis –40°C to +85°C 50 ppm Long-Term Drift 100 ppm/1000 Hours Line Regulation AVDD = 5 V ± 5% ±15 ppm/V Turn-On Settling Time CREF = 10 µF 5 ms Temperature Pin Voltage Output @ 25°C 300 mV Temperature Sensitivity 1 mV/°C Output Resistance 4 kΩ External Reference Voltage Range 2.3 2.5 AVDD – 1.85 V External Reference Current Drain 1 MSPS Throughput 242 µA Rev. 0 | Page 3 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DEFINITIONS OF SPECIFICATIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION Modes Of Operation Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Input Driver Amplifier Choice Voltage Reference Input Power Supply POWER DISSIPATION VERSUS THROUGHPUT CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read After Conversion External Clock Data Read During Conversion MICROPROCESSOR INTERFACING SPI Interface (ADSP-219x) APPLICATION HINTS BIPOLAR AND WIDER INPUT RANGES LAYOUT EVALUATING THE AD7667’S PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE