Datasheet AD7440, AD7450A (Analog Devices) - 16

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AD7440/AD7450A Data Sheet TYPICAL CONNECTION DIAGRAM
The common mode is the average of the two signals, that is, Figure 26 shows a typical connection diagram for the (VIN+ + VIN–)/2 and is therefore the voltage that the two inputs AD7440/AD7450A for both 5 V and 3 V supplies. In this setup, are centered on. This results in the span of each input being the GND pin is connected to the analog ground plane of the CM ± VREF/2. This voltage has to be set up externally, and its system. The V range varies with VREF. As the value of VREF increases, the REF pin is connected to either a 2.5 V or a 2 V decoupled reference source, depending on the power supply, to common-mode range decreases. When driving the inputs with set up the analog input range. The common-mode voltage has an amplifier, the actual common-mode range is determined by to be set up external y and is the value on which the two inputs the amplifier’s output voltage swing. are centered. The conversion result is output in a 16-bit word Figure 28 and Figure 29 show how the common-mode range with four leading zeros followed by the MSB of the 12-bit or typical y varies with VREF for both a 5 V and a 3 V power supply. 10-bit result. The 10-bit result of the AD7440 is fol owed by two The common mode must be in this range to guarantee the trailing zeros. For more details on driving the differential inputs functionality of the AD7440/AD7450A. and setting up the common mode, refer to the Driving For ease of use, the common mode can be set up to equal V Differential Inputs section. REF, resulting in the differential signal being ±VREF centered on VREF.
3V/5V SUPPLY 0.1
µ
F 10
µ
F
When a conversion takes place, the common mode is rejected,
SERIAL
resulting in a virtually noise-free signal of amplitude –VREF to
INTERFACE
+V
V
REF, corresponding to the digital codes of 0 to 4096 in the
DD VREF
case of the AD7450A and 0 to 1024 in the AD7440.
CM* VIN+ SCLK p-p AD7440/ 4.5 SDATA
µ
C/
µ
P AD7450A VREF CM* V CS 4.0 IN– p-p GND VREF 3.5 3.25V 2V/2.5V 3.0 VREF 0.1
µ
F 2.5 COMMON-MODE RANGE 2.0 *CM IS THE COMMON-MODE VOLTAGE.
03051-A-026
1.5 1.75V
Figure 26. Typical Connection Diagram
ANALOG INPUT 1.0 COMMON-MODE VOLTAGE (V) 0.5
The analog input of the AD7440/AD7450A is fully differential. Differential signals have a number of benefits over single-
0
03051-A-028
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
ended signals, including noise immunity based on the device’s
VREF (V)
common-mode rejection, improvements in distortion perfor- Figure 28. Input Common-Mode Range vs. VREF mance, doubling of the device’s available dynamic range, and (VDD = 5 V and VREF (Max) = 3.5 V) flexibility in input ranges and bias points. Figure 27 defines the
2.5
fully differential analog input of the AD7440/AD7450A.
2V 2.0 VREF p-p VIN+ AD7440/ AD7450A 1.5 VREF V COMMON-MODE RANGE IN– p-p COMMON-MODE VOLTAGE 1.0
03051-A-027
1V
Figure 27. Differential Input Definitions The amplitude of the differential signal is the difference
COMMON-MODE VOLTAGE (V) 0.5
between the signals applied to the VIN+ and VIN– pins (that is, V
0
03051-A-029 IN+ – VIN–). VIN+ and VIN– are simultaneously driven by
0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00
two signals each of amplitude VREF that are 180° out of phase.
VREF (V)
The amplitude of the differential signal is therefore –V REF to Figure 29. Input Common-Mode Range vs. V +V REF REF peak-to-peak (2 × VREF). This is true regardless of the (VDD = 3 V and VREF (Max) =2V) common mode (CM). Rev. D | Page 16 of 27 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY AD7440–SPECIFICATIONS AD7450A–SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY AD7440/AD7450A–TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT Analog Input Structure DRIVING DIFFERENTIAL INPUTS Differential Amplifier Op Amp Pair RF Transformer DIGITAL INPUTS REFERENCE Example 1 Example 2 SINGLE-ENDED OPERATION SERIAL INTERFACE Timing Example 1 Timing Example 2 MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER-UP TIME POWER vs. THROUGHPUT RATE GROUNDING AND LAYOUT HINTS EVALUATING THE AD7440/AD7450A PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE