Datasheet AD7732 (Analog Devices) - 2

AD7732* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS TOOLS AND SIMULATIONS
View a parametric search of comparable parts. • Sigma-Delta ADC Tutorial
EVALUATION KITS REFERENCE MATERIALS
• AD7732 Evaluation Board
Technical Articles
• Delta-Sigma Rocks RF, As ADC Designers Jump On Jitter
DOCUMENTATION
• MS-2210: Designing Power Supplies for High Speed ADC
Application Notes
• Part 1: Circuit Suggestions Using Features and • AN-202: An IC Amplifier User’s Guide to Decoupling, Functionality of New Sigma-Delta ADCs Grounding, and Making Things Go Right for a Change • Part 2: Circuit Suggestions Using Features and • AN-283: Sigma-Delta ADCs and DACs Functionality of New Sigma-Delta ADCs • AN-311: How to Reliably Protect CMOS Circuits Against Power Supply Overvoltaging
DESIGN RESOURCES
• AN-388: Using Sigma-Delta Converters-Part 1 • AD7732 Material Declaration • AN-389: Using Sigma-Delta Converters-Part 2 • PCN-PDN Information • AN-397: Electrically Induced Damage to Standard Linear • Quality And Reliability Integrated Circuits: • Symbols and Footprints • AN-607: Selecting a Low Bandwidth (<15 kSPS) Sigma- Delta ADC
DISCUSSIONS
• AN-615: Peak-to-Peak Resolution Versus Effective View all AD7732 EngineerZone Discussions. Resolution • AN-626: Using the AD7732/AD7734/AD7738/AD7739
SAMPLE AND BUY
Checksum Register • AN-663: AD7732/AD7734/AD7738/AD7739 Calibration Visit the product page to see pricing options. Registers • AN-664: AD7732/AD7734/AD7738/AD7739 in Low Power
TECHNICAL SUPPORT
Applications Submit a technical question or find your regional support
Data Sheet
number. • AD7732: 2-Channel, ±10 V Input Range, High Throughput, 24-Bit Sigma-Delta ADC Data Sheet
DOCUMENT FEEDBACK
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SOFTWARE AND SYSTEMS REQUIREMENTS
• AD7734 - Microcontroller No-OS Driver • AD7732/4/8/9 Evaluation Software
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY AD7732—SPECIFICATIONS Table 1. (–40°C to +105°C; AVDD = 5 V ± 5%; DVDD = 2.7 V to 3.6 V, or 5 V ± 5%; BIAS (all), REFIN(+) = 2.5 V; REFIN(–) = AGND; RA, RB, RC, RD open circuit; AIN Range = ±10 V; fMCLKIN = 6.144 MHz; unless otherwise noted.) TIMING SPECIFICATIONS Table 2. (AVDD = 5 V ± 5%; DVDD = 2.7 V to 3.6 V, or 5 V ± 5%; Input Logic 0 = 0 V; Logic 1 = DVDD; unless otherwise noted.) ABSOLUTE MAXIMUM RATINGS Table 3. TA = 25°C, unless otherwise noted. TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT NOISE AND RESOLUTION SPECIFICATION Chopping Enabled Table 4. Typical Output RMS Noise in µV vs. Conversion Time and Input Range with Chopping Enabled Table 5. Typical Effective Resolution in Bits vs. Conversion Time and Input Range with Chopping Enabled Table 6. Typical Peak-to-Peak Resolution in Bits vs. Conversion Time and Input Range with Chopping Enabled Chopping Disabled Table 7. Typical Output RMS Noise in µV vs. Conversion Time and Input Range with Chopping Disabled Table 8. Typical Effective Resolution in Bits vs. Conversion Time and Input Range with Chopping Disabled Table 9. Typical Peak-to-Peak Resolution in Bits vs. Conversion Time and Input Range with Chopping Disabled PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS Table 10. Pin Function Descriptions—28-Lead TSSOP REGISTER DESCRIPTION Table 11. Register Summary Table 12. Operational Mode Summary Table 13. Input Range Summary Register Access Communications Register Table 14. I/O Port Register Revision Register Test Register ADC Status Register Checksum Register ADC Zero-Scale Calibration Register ADC Full-Scale Register Channel Data Registers Channel Zero-Scale Calibration Registers Channel Full-Scale Calibration Registers Channel Status Registers Channel Setup Registers Table 15. Channel Conversion Time Registers Mode Register DIGITAL INTERFACE DESCRIPTION Hardware Reset Access the AD7732 Registers Single Conversion and Reading Data Dump Mode Continuous Conversion Mode Continuous Read (Continuous Conversion) Mode CIRCUIT DESCRIPTION Analog Front End Analog Input’s Extended Voltage Range Table 16. Extended Input Voltage Range, Nominal Voltage Range ±10 V, 16 Bits, CLAMP = 0 Table 17. Extended Input Voltage Range, Nominal Voltage Range 0 V to +10 V, 16 Bits, CLAMP = 0 Chopping Multiplexer, Conversion, and Data Output Timing Sigma-Delta ADC Frequency Response Voltage Reference Inputs Reference Detect I/O Port Calibration ADC Zero-Scale Self-Calibration Per Channel System Calibration High Common-Mode Voltage Application OUTLINE DIMENSIONS Ordering Guide