link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 Data SheetAD7904/AD7914/AD7924SPECIFICATIONS AD7904 SPECIFICATIONS AVDD = VDRIVE = 2.7 V to 5.25 V, REFIN = 2.5 V, fSCLK = 20 MHz, TA = TMIN to TMAX, unless otherwise noted. Table 1. ParameterB Version1UnitTest Conditions/Comments DYNAMIC PERFORMANCE fIN = 50 kHz sine wave, fSCLK = 20 MHz Signal to (Noise + Distortion) (SINAD)2 49 dB min B models 48.5 dB min W models Signal-to-Noise Ratio (SNR) 49 dB min B models 48.5 dB min W models Total Harmonic Distortion (THD)2 −66 dB max Peak Harmonic or Spurious Noise (SFDR) −64 dB max Intermodulation Distortion (IMD) fa = 40.1 kHz, fb = 41.5 kHz Second-Order Terms −90 dB typ Third-Order Terms −90 dB typ Aperture Delay 10 ns typ Aperture Jitter 50 ps typ Channel-to-Channel Isolation2 −85 dB typ fIN = 400 kHz Full Power Bandwidth 8.2 MHz typ @ 3 dB 1.6 MHz typ @ 0.1 dB DC ACCURACY Resolution 8 Bits Integral Nonlinearity (INL)2 ±0.2 LSB max Differential Nonlinearity (DNL)2 ±0.2 LSB max Guaranteed no missed codes to 8 bits 0 V to REFIN Input Range Straight binary output coding Offset Error2 ±0.5 LSB max Offset Error Match2 ±0.05 LSB max Gain Error2 ±0.2 LSB max Gain Error Match2 ±0.05 LSB max 0 V to 2 × REFIN Input Range −REFIN to +REFIN biased about REFIN with twos complement output coding Positive Gain Error2 ±0.2 LSB max Positive Gain Error Match2 ±0.05 LSB max Zero Code Error2 ±0.5 LSB max Zero Code Error Match2 ±0.1 LSB max Negative Gain Error2 ±0.2 LSB max Negative Gain Error Match2 ±0.05 LSB max ANALOG INPUT Input Voltage Range 0 to REFIN V RANGE bit set to 1 0 to 2 × REFIN V RANGE bit set to 0, AVDD/VDRIVE = 4.75 V to 5.25 V DC Leakage Current ±1 μA max Input Capacitance 20 pF typ REFERENCE INPUT REFIN Input Voltage 2.5 V ±1% specified performance DC Leakage Current ±1 μA max REFIN Input Impedance 36 kΩ typ fSAMPLE = 1 MSPS LOGIC INPUTS Input High Voltage, VINH 0.7 × VDRIVE V min Input Low Voltage, VINL 0.3 × VDRIVE V max Input Current, IIN ±1 μA max Typically 10 nA, VIN = 0 V or VDRIVE Input Capacitance, C 3 IN 10 pF max Rev. C | Page 3 of 32 Document Outline Features Functional Block Diagram General Description Product Highlights Revision History Specifications AD7904 Specifications AD7914 Specifications AD7924 Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Control Register Sequencer Operation Circuit Information Converter Operation Analog Input ADC Transfer Function Handling Bipolar Input Signals Typical Connection Diagram Analog Input Selection Digital Inputs VDRIVE Reference Modes of Operation Normal Mode (PM1 = PM0 = 1) Full Shutdown Mode (PM1 = 1, PM0 = 0) Auto Shutdown Mode (PM1 = 0, PM0 = 1) Powering Up the AD7904/AD7914/AD7924 Power vs. Throughput Rate Serial Interface Applications Information Microprocessor Interfacing AD7904/AD7914/AD7924 to TMS320C541 AD7904/AD7914/AD7924 to ADSP-218x AD7904/AD7914/AD7924 to DSP563xx Grounding and Layout Outline Dimensions Ordering Guide Automotive Products