Datasheet AD7654 (Analog Devices) - 4

ManufacturerAnalog Devices
DescriptionDual, 2-Channel, Simultaneous Sampling, PulSAR , 500 kSPS, 16-Bit ADC
Pages / Page28 / 4 — Data Sheet. AD7654. SPECIFICATIONS. Table 2. Parameter. Test …
RevisionD
File Format / SizePDF / 478 Kb
Document LanguageEnglish

Data Sheet. AD7654. SPECIFICATIONS. Table 2. Parameter. Test Conditions/Comments. Min. Typ. Max. Unit

Data Sheet AD7654 SPECIFICATIONS Table 2 Parameter Test Conditions/Comments Min Typ Max Unit

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Data Sheet AD7654 SPECIFICATIONS
AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V; all specifications TMIN to TMAX, unless otherwise noted.
Table 2. Parameter Test Conditions/Comments Min Typ Max Unit
RESOLUTION 16 Bits ANALOG INPUT Voltage Range VINx – VINxN 0 2 VREF V Common-Mode Input Voltage VINxN −0.1 +0.5 V Analog Input CMRR fIN = 100 kHz 55 dB Input Current 500 kSPS throughput 45 μA Input Impedance1 THROUGHPUT SPEED Complete Cycle In normal mode 2 μs Throughput Rate In normal mode 0 500 kSPS Complete Cycle In impulse mode 2.25 μs Throughput Rate In impulse mode 0 444 kSPS DC ACCURACY Integral Linearity Error2 −3.5 +3.5 LSB3 No Missing Codes 16 Bits Transition Noise 0.7 LSB Full-Scale Error4 TMIN to TMAX ±0.25 ±0.5 % of FSR Full-Scale Error Drift4 ±2 ppm/°C Unipolar Zero Error4 TMIN to TMAX ±0.25 % of FSR Unipolar Zero Error Drift4 ±0.8 ppm/°C Power Supply Sensitivity AVDD = 5 V ±5% 0.8 LSB AC ACCURACY Signal-to-Noise fIN = 20 kHz 88 90 dB5 fIN = 100 kHz 89 dB Spurious-Free Dynamic Range fIN = 100 kHz 105 dB Total Harmonic Distortion fIN = 100 kHz −100 dB Signal-to-Noise and Distortion fIN = 20 kHz 87.5 90 dB fIN = 100 kHz 88.5 dB fIN = 100 kHz, −60 dB Input 30 dB Channel-to-Channel Isolation fIN = 100 kHz −92 dB −3 dB Input Bandwidth 10 MHz SAMPLING DYNAMICS Aperture Delay 2 ns Aperture Delay Matching 30 ps Aperture Jitter 5 ps rms Transient Response Full-scale step 250 ns REFERENCE External Reference Voltage Range 2.3 2.5 AVDD/2 V External Reference Current Drain 500 kSPS throughput 180 μA DIGITAL INPUTS Logic Levels VIL −0.3 +0.8 V VIH +2.0 DVDD + 0.3 V IIL −1 +1 μA IIH −1 +1 μA Rev. D | Page 3 of 27 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION CIRCUIT INFORMATION MODES OF OPERATION TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS INPUT CHANNEL MULTIPLEXER DRIVER AMPLIFIER CHOICE VOLTAGE REFERENCE INPUT POWER SUPPLY POWER DISSIPATION CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 8-Bit Interface (Master or Slave) Channel A//B Output SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read After Convert External Clock Data Read Previous During Convert MICROPROCESSOR INTERFACING SPI INTERFACE (ADSP-2191M) APPLICATION HINTS LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE