Datasheet AD7475, AD7495 (Analog Devices) - 10

AD7475/AD7495 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS REF IN 1 8 V REF OUT 1 8 V DD DD V 2 AD7475 7 V 2 AD7495 7 IN CS IN CS TOP VIEW TOP VIEW GND 3 GND V (Not to Scale) 6 VDRIVE 3 (Not to Scale) 6 DRIVE SCLK 4 5 SDATA SCLK 4 5 SDATA
01684-B-005 01684-B-006 Figure 5. AD7475 SOIC/MSOP Pin Configuration Figure 6. AD7495 SOIC/MSOP Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 (AD7475) REF IN Reference Input for the AD7475. Apply an external reference to this input. The voltage range for the external reference is 2.5 V ± 1% for specified performance. Place a capacitor of a least 0.1 µF on the REF IN pin. 1 (AD7495) REF OUT Reference Output for the AD7495. A minimum 100 nF capacitance is required from this pin to GND. The internal reference can be taken from this pin, but buffering is required before it is applied elsewhere in a system. 2 VIN Analog Input. Single-ended analog input channel. The input range is 0 to REF IN. 3 GND Analog Ground. Ground reference point for all circuitry on the AD7475/AD7495. Refer all analog input signals and any external reference signal to this GND voltage. 4 SCLK Serial Clock, Logic Input. SCLK provides the serial clock for accessing data from the device. This clock input is also used as the clock source for the AD7475/AD7495 conversion process. 5 SDATA Data Out, Logic Output. The conversion result from the AD7475/AD7495 is provided on this output as a serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream consists of four leading zeros followed by the 12 bits of conversion data, which is provided MSB first. 6 VDRIVE Logic Power Supply Input. The voltage supplied at this pin determines the operating voltage for the serial interface of the AD7475/AD7495. 7 CS Chip Select, Active Low Logic Input. This input provides the dual function of initiating conversions on the AD7475/AD7495 and frames the serial data transfer. 8 VDD Power Supply Input. The VDD range for the AD7475/AD7495 is from 2.7 V to 5.25 V. Rev. C | Page 10 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS REVISION HISTORY AD7475 SPECIFICATIONS AD7495 SPECIFICATIONS TIMING EXAMPLE 1 TIMING EXAMPLE 2 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM Analog Input Digital Inputs VDRIVE Reference Section OPERATING MODES NORMAL MODE PARTIAL POWER-DOWN MODE Power-Up Time FULL POWER-DOWN MODE POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7475/AD7495 TO TMS320C5x/C54x AD7475/AD7495 TO ADSP-21xx AD7475/AD7495 TO DSP56xxx AD7475/AD7495 TO MC68HC16 OUTLINE DIMENSIONS ORDERING GUIDE