Datasheet AD9410 (Analog Devices) - 9

ManufacturerAnalog Devices
Description10-Bit, 210 MSPS ADC
Pages / Page21 / 9 — AD9410. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. ) B. (MS. I/P. 80 79 …
RevisionA
File Format / SizePDF / 389 Kb
Document LanguageEnglish

AD9410. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. ) B. (MS. I/P. 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61

AD9410 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ) B (MS I/P 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61

Model Line for this Datasheet

Text Version of Document

AD9410 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ) B S ND ND ND ND ND ND ND A (MS D D D D DD A9 A8 A7 A6 A5 I/P DF AG AG V V AG AG AG AG V V DG V OR D D D D D 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 AGND 1 60 VDD PIN 1 AGND 2 59 DGND IDENTIFIER V 3 58 CC DA4 REF 4 57 OUT DA3 REF 5 56 IN DA2 DNC 6 55 DA1 V 7 54 CC DA0 (LSB) AGND 8 53 VDD AGND 9 AD9410 52 DGND A 10 TOP VIEW 51 IN DCO 80-LEAD THIN QUAD FLAT PACKAGE A 11 50 IN (Not to Scale) DCO AGND 12 49 DGND AGND 13 48 VDD V 14 47 CC ORB V 15 46 CC DB9 (MSB) AGND 16 45 DB8 AGND 17 44 DB7 CLK+ 18 43 DB6 CLK– 19 42 DB5 AGND 20 41 VDD 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 D D D D ND DS DS ND V V ND ND ND ND V V ND DD B0 B1 B2 B3 B4 V D D D D ND
3
AG AG AG AG AG AG DG ) D DG
00
B
9-
S
67
(L DNC = DO NOT CONNECT.
01 Figure 3. Pin Configuration
Table 6. Pin Function Descriptions Pin No. Mnemonic Function
1, 2, 8, 9, 12, 13, 16, AGND Analog Ground. 17, 20, 21, 24, 27, 28, 29, 30, 71, 72, 73, 74, 77, 78 3, 7, 14, 15 VCC 5 V Supply. (Regulate to within ±5%.) 4 REFOUT Internal Reference Output. 5 REFIN Internal Reference Input. 6 DNC Do Not Connect. 10 AIN Analog Input—True. 11 AIN Analog Input—Complement. 18 CLK+ Clock Input—True. 19 CLK− Clock Input—Complement. 22 DS Data Sync (Input)—True. Tie low if not used. 23 DS Data Sync (Input)—Complement. Float and decouple with 0.1 μF capacitor if not used. 25, 26, 31, 32, 69, 70, VD 3.3 V Analog Supply. (Regulate to within ±5%.) 75, 76 33, 40, 49, 52, 59, 68 DGND Digital Ground. 34, 41, 48, 53, 60, 67 VDD 3.3 V Digital Output Supply. (2.5 V to 3.6 V) 35 to 39 DB0 to DB4 Digital Data Output for Channel B. (LSB = DB0.) 42 to 46 DB5 to DB9 Digital Data Output for Channel B. (MSB = DB9.) 47 ORB Data Overrange for Channel B. 50 DCO Clock Output—Complement. Rev. A | Page 8 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS SWITCHING SPECIFICATIONS DIGITAL SPECIFICATIONS AC SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS EXPLAINATION OF TEST LEVELS Test Level ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY EQUIVALENT CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION USING THE AD9410 Clock Input ANALOG INPUT DIGITAL OUTPUTS CLOCK OUTPUTS (DCO, ) VOLTAGE REFERENCE TIMING DATA SYNC (DS) OUTLINE DIMENSIONS ORDERING GUIDE