Datasheet AD9224 (Analog Devices) - 2

ManufacturerAnalog Devices
Description12-Bit 40 MSPS Monolithic A/D Converter
Pages / Page24 / 2 — AD9224–SPECIFICATIONS
RevisionA
File Format / SizePDF / 316 Kb
Document LanguageEnglish

AD9224–SPECIFICATIONS

AD9224–SPECIFICATIONS

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AD9224–SPECIFICATIONS
DC SPECIFICATIONS (AVDD = +5 V, DRVDD = +3 V, f SAMPLE = 40 MSPS, VREF = 2.0 V, VINB = 2.5 V dc, TMIN to TMAX unless otherwise noted) Parameter Min RESOLUTION 12 Bits MAX CONVERSION RATE 40 MHz INPUT REFERRED NOISE
VREF = 1.0 V
VREF = 2.0 V
ACCURACY
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
No Missing Codes Guaranteed
Zero Error (@ +25°C)
Gain Error (@ +25°C)1
Gain Error (@ +25°C)2 Typ 0.35
0.17 12 ± 2.5
± 1.0 ± 0.12
± 0.3
± 0.4 ± 0.3
± 2.2
± 1.6 ±2
± 26
± 0.4 POWER SUPPLY REJECTION
AVDD (+5 V ± 0.25 V) ± 0.07 AVDD 1.0
±5
2.0
± 10
1.0
± 1.0 REFERENCE INPUT RESISTANCE 5 POWER SUPPLIES
Supply Voltages
AVDD
DRVDD
Supply Current
IAVDD
IDRVDD ± 0.24 10 INTERNAL VOLTAGE REFERENCE
Output Voltage (1 V Mode)
Output Voltage Tolerance (1 V Mode)
Output Voltage (2.0 V Mode)
Output Voltage Tolerance (2.0 V Mode)
Output Current (Available for External Loads)
Load Regulation3 4.75
2.85 POWER CONSUMPTION LSB
LSB
Bits
% FSR
% FSR
% FSR
ppm/°C
ppm/°C
ppm/°C 2
4
0 Units LSB rms
LSB rms ± 1.5
± 0.33 TEMPERATURE DRIFT
Zero Error
Gain Error1
Gain Error2 ANALOG INPUT
Input Span (VREF = 1 V)
(VREF = 2 V)
Input (VINA or VINB) Range
Input Capacitance Max ± 17
± 35
± 3.4 % FSR
V p-p
V p-p
V
pF
V
mV
V
mV
mA
mV
kΩ 5 5.25
5.25 V (± 5% AVDD Operating)
V (± 5% DRVDD Operating) 82
4.3 87
5 mA (2 V Internal VREF)
mA (2 V Internal VREF) 415
425 445
450 mW (1 V Internal Ref)
mW (2 V Internal Ref) NOTES
1
Includes internal voltage reference error.
2
Excludes internal voltage reference error.
3
Load regulation with 1 mA load current (in addition to that required by the AD9224).
Specifications subject to change without notice. –2– REV. A