Datasheet AD7723 (Analog Devices) - 4

ManufacturerAnalog Devices
Description16-Bit, 1.2 MSPS, CMOS Sigma-Delta ADC
Pages / Page33 / 4 — AD7723. SPECIFICATIONS1. Table 1. Version. Parameter Test. …
RevisionC
File Format / SizePDF / 555 Kb
Document LanguageEnglish

AD7723. SPECIFICATIONS1. Table 1. Version. Parameter Test. Conditions/Comments. Min. Typ. Max. Unit

AD7723 SPECIFICATIONS1 Table 1 Version Parameter Test Conditions/Comments Min Typ Max Unit

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AD7723 SPECIFICATIONS1
AVDD = DVDD = 5 V ± 5%; AGND = AGND1 = AGND2 = DGND = 0 V; fCLKIN = 19.2 MHz; REF2 = 2.5 V; TA = TMIN to TMAX, unless otherwise noted.
Table 1. B Version Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC SPECIFICATIONS2, 3 HALF_PWR = 0 to 1 fCLKIN = 10 MHz when HALF_PWR = 1 Decimate by 32 Bipolar Mode Signal to Noise Full Power 2.5 V reference 87 90 dB 3 V reference 88.5 91 dB Half Power 86.5 89 dB Total Harmonic Distortion4 −96 −90 dB Spurious-Free Dynamic Range4 2.5 V reference −92 dB 3 V reference −90 dB Unipolar Mode Signal to Noise 87 dB Total Harmonic Distortion4 −89 dB Spurious-Free Dynamic Range4 −90 dB Band-Pass Filter Mode Bipolar Mode Signal to Noise 76 79 dB Decimate by 16 Bipolar Mode Signal to Noise Measurement bandwidth = 0.383 × FO 2.5 V reference 82 86 dB 3 V reference 83 87 dB Signal to Noise Measurement bandwidth = 0.5 × FO 78 81.5 dB Total Harmonic Distortion4 2.5 V reference −88 dB Spurious-Free Dynamic Range4 3 V reference −86 dB 2.5 V reference −90 dB 3 V reference −88 dB Unipolar Mode Signal to Noise Measurement bandwidth = 0.383 × FO 84 dB Signal to Noise Measurement bandwidth = 0.5 × FO 81 dB Total Harmonic Distortion4 −89 dB DIGITAL FILTER RESPONSE Low-Pass Decimate by 32 0 kHz to fCLKIN/83.5 ±0.001 dB fCLKIN/66.9 −3 dB fCLKIN/64 −6 dB fCLKIN/51.9 to fCLKIN/2 −90 dB Group Delay 1293/2 fCLKIN Settling Time 1293/fCLKIN Rev. C | Page 3 of 32 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT DESCRIPTION APPLYING THE AD7723 ANALOG INPUT RANGE ANALOG INPUT DRIVING THE ANALOG INPUTS APPLYING THE REFERENCE CLOCK GENERATION SYSTEM SYNCHRONIZATION DATA INTERFACING PARALLEL INTERFACE SERIAL INTERFACE TWO-CHANNEL MULTIPLEXED OPERATION SERIAL INTERFACE TO DSPs AD7723 TO ADSP-21xx INTERFACE AD7723 TO SHARC INTERFACE AD7723 TO DSP56002 INTERFACE AD7723 TO TMS320C5x INTERFACE GROUNDING AND LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE