Datasheet AD7705, AD7706 (Analog Devices) - 10

AD7705/AD7706 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS SCLK 1 16 GND SCLK 1 16 GND MCLK IN 2 15 V MCLK IN 2 15 V DD DD MCLK OUT 3 14 DIN MCLK OUT 3 14 DIN AD7706 AD7705 CS 4 TOP VIEW 13 DOUT CS 4 13 DOUT TOP VIEW (Not to Scale) RESET 5 12 DRDY RESET 5 (Not to Scale) 12 DRDY AIN1 6 11 AIN3 AIN2(+) 6 11 AIN2(–) AIN2 7 10 REF IN(–) AIN1(+) 7 10 REF IN(–) 8 9 AIN1(–) COMMON REF IN(+) 8 9 REF IN(+)
01166-003 01166-004 Figure 3. AD7705 Pin Configuration Figure 4. AD7706 Pin Configuration
Table 4. Pin Function Descriptions Mnemonic Pin No. AD7705 AD7706 Description
1 SCLK SCLK Serial Clock. An external serial clock is applied to the Schmitt-triggered logic input to access serial data from the AD7705/AD7706. This serial clock can be a continuous clock with all data transmitted in a continuous train of pulses. Alternatively, it can be a noncontinuous clock with the information transmitted to the AD7705/AD7706 in smaller batches of data. 2 MCLK IN MCLK IN Master Clock Signal. This can be provided in the form of a crystal/resonator or external clock. A crystal/resonator can be tied across the Pin MCLK IN and Pin MCLK OUT. Alternatively, the MCLK IN pin can be driven with a CMOS-compatible clock with the MCLK OUT pin left unconnected. The parts can be operated with clock frequencies in the range of 500 kHz to 5 MHz. 3 MCLK OUT MCLK OUT When the master clock for these devices is a crystal/resonator, the crystal/resonator is connected between Pin MCLK IN and Pin MCLK OUT. If an external clock is applied to Pin MCLK IN, Pin MCLK OUT provides an inverted clock signal. This clock can be used to provide a clock source for external circuitry and is capable of driving 1 CMOS load. If the user does not require this clock externally, Pin MCLK OUT can be turned off via the CLKDIS bit of the clock register. This ensures that the part does not unnecessarily burn power driving capacitive loads on Pin MCLK OUT. 4 CS CS Chip Select. Active low logic input used to select the AD7705/AD7706. With this input hardwired low, the AD7705/AD7706 can operate in its 3-wire interface mode with Pin SCLK, Pin DIN, and Pin DOUT used to interface to the device. The CS pin can be used to select the device communicating with the AD7705/AD7706. 5 RESET RESET Logic Input. Active low input that resets the control logic, interface logic, calibration coefficients, digital filter, and analog modulator of the parts to power-on status. 6 AIN2(+) AIN1 Positive Input of the Differential Analog Input Pair AIN2(+)/AIN2(−) for AD7705. Channel 1 for AD7706. 7 AIN1(+) AIN2 Positive Input of the Differential Analog Input Pair AIN1(+)/AIN1(−) for AD7705. Channel 2 for AD7706. 8 AIN1(−) COMMON Negative Input of the Differential Analog Input Pair AIN1(+)/AIN1(−) for AD7705. COMMON input for AD7706 with Channel 1, Channel 2, and Channel 3 referenced to this input. 9 REF IN(+) REF IN(+) Reference Input. Positive input of the differential reference input to the AD7705/AD7706. The reference input is differential with the provision that REF IN(+) must be greater than REF IN(−). REF IN(+) can lie anywhere between VDD and GND. 10 REF IN(−) REF IN(−) Reference Input. Negative input of the differential reference input to the AD7705/AD7706. The REF IN(−) can lie anywhere between VDD and GND, provided that REF IN(+) is greater than REF IN(−). 11 AIN2(−) AIN3 Negative Input of the Differential Analog Input Pair AIN2(+)/AIN2(−) for AD7705. Channel 3 for AD7706. 12 DRDY DRDY Logic Output. A logic low on this output indicates that a new output word is available from the AD7705/AD7706 data register. The DRDY pin returns high upon completion of a read operation of a full output word. If no data read has taken place between output updates, the DRDY line returns high for 500 × tCLK IN cycles prior to the next output update. While DRDY is high, a read operation should neither be attempted nor in progress to avoid reading from the data register as it is being updated. The DRDY line returns low after the update has taken place. DRDY is also used to indicate when the AD7705/AD7706 has completed its on-chip calibration sequence. 13 DOUT DOUT Serial Data Output. Serial data is read from the output shift register on the part. The output shift register can contain information from the setup register, communication register, clock register, or data register, depending on the register selection bits of the communication register. Rev. C | Page 10 of 44 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS OUTPUT NOISE (5 V OPERATION) OUTPUT NOISE (3 V OPERATION) TYPICAL PERFORMANCE CHARACTERISTICS ON-CHIP REGISTERS COMMUNICATION REGISTER (RS2, RS1, RS0 = 0, 0, 0) SETUP REGISTER (RS2, RS1, RS0 = 0, 0, 1); POWER-ON/RESET STATUS: 01 HEXADECIMAL CLOCK REGISTER (RS2, RS1, RS0 = 0, 1, 0); POWER-ON/RESET STATUS: 05 HEXADECIMAL DATA REGISTER (RS2, RS1, RS0 = 0, 1, 1) TEST REGISTER (RS2, RS1, RS0 = 1, 0, 0); POWER-ON/RESET STATUS: 00 HEXADECIMAL ZERO-SCALE CALIBRATION REGISTER (RS2, RS1, RS0 = 1, 1, 0); POWER-ON/RESET STATUS: 1F4000 HEXADECIMAL FULL-SCALE CALIBRATION REGISTER (RS2, RS1, RS0 = 1, 1, 1); POWER-ON/RESET STATUS: 5761AB HEXADECIMAL Calibration Sequences CIRCUIT DESCRIPTION ANALOG INPUT Ranges Sample Rate BIPOLAR/UNIPOLAR INPUT REFERENCE INPUT DIGITAL FILTERING Filter Characteristics Postfiltering ANALOG FILTERING CALIBRATION Self-Calibration System Calibration Span and Offset Limits Power-Up and Calibration THEORY OF OPERATION CLOCKING AND OSCILLATOR CIRCUIT SYSTEM SYNCHRONIZATION RESET INPUT STANDBY MODE ACCURACY DRIFT CONSIDERATIONS POWER SUPPLIES SUPPLY CURRENT GROUNDING AND LAYOUT EVALUATING THE PERFORMANCE DIGITAL INTERFACE CONFIGURING THE AD7705/AD7706 MICROCOMPUTER/MICROPROCESSOR INTERFACING AD7705/AD7706-to-68HC11 Interface AD7705/AD7706-to-8051 Interface AD7705/AD7706-to-ADSP-2103/ADSP-2105 Interface CODE FOR SETTING UP THE AD7705/AD7706 C Code for Interfacing AD7705 to 68HC11 APPLICATIONS PRESSURE MEASUREMENT TEMPERATURE MEASUREMENT SMART TRANSMITTERS BATTERY MONITORING OUTLINE DIMENSIONS ORDERING GUIDE