Datasheet AD7862 (Analog Devices) - 8

AD7862 CONVERTER DETAILS
The acquisition time of the track/hold amplifiers begins at The AD7862 is a high speed, low power, dual 12-bit A/D this point. converter that operates from a single +5 V supply. The part
Reference Section
contains two 4 µs successive approximation ADCs, two track/ The AD7862 contains a single reference pin, labelled VREF, hold amplifiers, an internal +2.5 V reference and a high speed which either provides access to the part’s own +2.5 V reference parallel interface. There are four analog inputs that are grouped or to which an external +2.5 V reference can be connected to into two channels (A & B) selected by the A0 input. Each provide the reference source for the part. The part is specified channel has two inputs (VA1 & VA2 or VB1 & VB2) that can be with a +2.5 V reference voltage. Errors in the reference source sampled and converted simultaneously thus preserving the will result in gain errors in the AD7862’s transfer function and relative phase information of the signals on both analog inputs. will add to the specified full-scale errors on the part. On the The part accepts an analog input range of ± 10 V (AD7862-10), ± AD7862-10 and the AD7862-3, it will also result in an offset 2.5 V (AD7862-3) and 0 V–2.5 V (AD7862-2). Overvoltage error injected in the attenuator stage. protection on the analog inputs for the part allows the input voltage to go to ± 17 V, ± 7 V or +7 V, respectively, without The AD7862 contains an on-chip +2.5 V reference. To use this causing damage. The AD7862 has two operating modes, the reference as the reference source for the AD7862, simply high sampling mode and the auto sleep mode where the part connect a 0.1 µF disc ceramic capacitor from the VREF pin to automatically goes into sleep after the end of conversion. These AGND. The voltage that appears at this pin is internally modes are discussed in more detail in the Timing and Control buffered before being applied to the ADC. If this reference is Section. required for use external to the AD7862, it should be buffered as the part has a FET switch in series with the reference output, Conversion is initiated on the AD7862 by pulsing the CONVST resulting in a source impedance for this output of 3 kΩ nominal. input. On the falling edge of CONVST, both on-chip track/ The tolerance on the internal reference is ± 10 mV at 25°C with holds are placed into hold simultaneously, and the conversion a typical temperature coefficient of 25 ppm/°C and a maximum sequence is started on both channels. The conversion clock for error over temperature of ± 25 mV. the part is generated internally using a laser-trimmed clock oscillator circuit. The BUSY signal indicates the end of If the application requires a reference with a tighter tolerance or conversion, and at this time the conversion results for both the AD7862 needs to be used with a system reference, the user channels are available to be read. The first read after a conver- has the option of connecting an external reference to this VREF sion accesses the result from V pin. The external reference will effectively overdrive the internal A1 or VB1 while the second read accesses the result from V reference and provide the reference source for the ADC. The A2 or VB2, depending on whether the multiplexer select A0 is low or high, respectively. Data is read reference input is buffered before being applied to the ADC from the part via a 12-bit parallel data bus with standard CS with the maximum input current of ± 100 µA. Suitable reference and RD signals. sources for the AD7862 include the AD680, AD780 and REF43 precision +2.5 V references. Conversion time for the AD7862 is 3.6 µs in the high sampling mode (6 µs for the auto sleep mode), and the track/hold
CIRCUIT DESCRIPTION
acquisition time is 0.3 µs. To obtain optimum performance
Analog Input Section
from the part, the read operation should not occur during the The AD7862 is offered as three part types; the AD7862-10, conversion or during 300 ns prior to the next conversion. This which handles a ± 10 V input voltage range; the AD7862-3, allows the part to operate at throughput rates up to 250 kHz which handles input voltage range ± 2.5 V; and the AD7862-2, and achieve data sheet specifications. which handles a 0 V to +2.5 V input voltage range.
Track/Hold Section
The track/hold amplifiers on the AD7862 allow the ADCs to accurately convert an input sine wave of full-scale amplitude to
+2.5V REFERENCE
12-bit accuracy. The input bandwidth of the track/hold is
2k
Ω greater than the Nyquist rate of the ADC even when the ADC
VREF
is operated at its maximum throughput rate of 250 kHz (i.e., the track/hold can handle input frequencies in excess of 125 kHz).
TO ADC REFERENCE CIRCUITRY
The track/hold amplifiers acquire input signals to 12-bit
R2
accuracy in less than 400 ns. The operation of the track/holds is
R1 V TO INTERNAL AX MUX
essentially transparent to the user. The two track/hold amplifi-
COMPARATOR TRACK/ R3
ers sample their respective input channels simultaneously on the
HOLD
falling edge of CONVST. The aperture time for the track/holds
AGND AD7862-10/AD7862-3
(i.e., the delay time between the external CONVST signal and the track/hold actually going into hold) is typically 15 ns and, more importantly, is well matched across the two track/holds on Figure 3. AD7862-10/-3 Analog Input Structure one device and also well matched from device to device. This Figure 3 shows the analog input section for the AD7862-10 and allows the relative phase information between different input AD7862-3. The analog input range of the AD7862-10 is ± 10 V channels to be accurately preserved. It also allows multiple into an input resistance of typically 33 kΩ. The analog input AD7862s to sample more than two channels simultaneously. At range of the AD7862-3 is ± 2.5 V into an input resistance of the end of conversion, the part returns to its tracking mode. typically 12 kΩ. This input is benign with no dynamic charging REV. 0 –7–