Datasheet AD7854, AD7854L (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | 3 V to 5 V Single Supply, 200 kSPS, 12-Bit, Parallel Sampling ADC |
| Pages / Page | 28 / 5 — AD7854/AD7854L. ABSOLUTE MAXIMUM RATINGS1. 1.6mA. IOL. OUTPUT. +2.1V. … |
| Revision | B |
| File Format / Size | PDF / 265 Kb |
| Document Language | English |
AD7854/AD7854L. ABSOLUTE MAXIMUM RATINGS1. 1.6mA. IOL. OUTPUT. +2.1V. PIN. 50pF. 200µA. PIN CONFIGURATION. FOR DIP, SOIC AND SSOP. CONVST 1
Model Line for this Datasheet
Text Version of Document
AD7854/AD7854L ABSOLUTE MAXIMUM RATINGS1 1.6mA IOL
(TA = +25°C unless otherwise noted) AVDD to AGND . –0.3 V to +7 V
TO
DV
OUTPUT +2.1V
DD to DGND . –0.3 V to +7 V
PIN C
AV
L
DD to DVDD . –0.3 V to +0.3 V
50pF
Analog Input Voltage to AGND . –0.3 V to AVDD + 0.3 V Digital Input Voltage to DGND . –0.3 V to DV
200µA I
DD + 0.3 V
OH
Digital Output Voltage to DGND . –0.3 V to DVDD + 0.3 V REFIN/REFOUT to AGND . –0.3 V to AVDD + 0.3 V Figure 1. Load Circuit for Digital Output Timing Input Current to Any Pin Except Supplies2 . ± 10 mA Specifications Operating Temperature Range Commercial (A, B Versions) . –40°C to +85°C Commercial (S Version) . –55
PIN CONFIGURATION
°C to +125°C Storage Temperature Range . –65
FOR DIP, SOIC AND SSOP
°C to +150°C Junction Temperature . +150°C
CONVST 1 28 BUSY
Cerdip Package, Power Dissipation . 450 mW
WR 2 27 CLKIN
θJA Thermal Impedance . 75°C/W
RD 3 26 DB11
Lead Temperature, (Soldering, 10 secs) . +300°C
CS 4 25 DB10
SOIC, SSOP Package, Power Dissipation . 450 mW
5 24 REF DB9
θJA Thermal Impedance . 75°C/W (SOIC) 115°C/W (SSOP)
IN/REFOUT AD7854 AV 6 DD TOP VIEW 23 DGND
θJC Thermal Impedance . 25°C/W (SOIC) 35°C/W (SSOP)
(Not to Scale) AGND 7 22
Lead Temperature, Soldering
DVDD 8 C 21
Vapor Phase (60 secs) . +215
DB8
°C
REF1 C 9 20 DB7
Infrared (15 secs) . +220
REF2
°C
AIN(+) 10 19 DB6
NOTES 1
AIN(–) 11 18 DB5
Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the
HBEN 12 17 DB4
device at these or any other conditions above those listed in the operational
DB0 13 16 DB3
sections of this specification is not implied. Exposure to absolute maximum rating
DB1 14 15 DB2
conditions for extended periods may affect device reliability. 2Transient currents of up to 100 mA will not cause SCR latchup.
ORDERING GUIDE Linearity Power Temperature Error Dissipation Package Model Range1 (LSB) (mW) Option2
AD7854AQ –40°C to +85°C 1 15 Q-28 AD7854SQ –55°C to +125°C 1 15 Q-28 AD7854AR –40°C to +85°C 1 15 R-28 AD7854BR –40°C to +85°C 1/2 15 R-28 AD7854ARS –40°C to +85°C 1 15 RS-28 AD7854LAQ3 –40°C to +85°C 1 5.5 Q-28 AD7854LAR3 –40°C to +85°C 1 5.5 R-28 AD7854LARS3 –40°C to +85°C 1 5.5 RS-28 EVAL-AD7854CB4 EVAL-CONTROL BOARD5 NOTES 1Linearity error refers to the integral linearity error. 2Q = Cerdip; R = SOIC; RS = SSOP. 3L signifies the low power version. 4This can be used as a stand-alone evaluation board or in conjunction with the EVAL-CONTROL BOARD for evaluation/demonstration purposes. 5This board is a complete unit allowing a PC to control and communicate with all Analog Devices evaluation boards ending in the CB designator. For more information on Analog Devices products and evaluation boards visit our World Wide Web home page at http://www.analog.com. REV. B –5–
(TA = +25°C unless otherwise noted) AVDD to AGND . –0.3 V to +7 V
TO
DV
OUTPUT +2.1V
DD to DGND . –0.3 V to +7 V
PIN C
AV
L
DD to DVDD . –0.3 V to +0.3 V
50pF
Analog Input Voltage to AGND . –0.3 V to AVDD + 0.3 V Digital Input Voltage to DGND . –0.3 V to DV
200µA I
DD + 0.3 V
OH
Digital Output Voltage to DGND . –0.3 V to DVDD + 0.3 V REFIN/REFOUT to AGND . –0.3 V to AVDD + 0.3 V Figure 1. Load Circuit for Digital Output Timing Input Current to Any Pin Except Supplies2 . ± 10 mA Specifications Operating Temperature Range Commercial (A, B Versions) . –40°C to +85°C Commercial (S Version) . –55
PIN CONFIGURATION
°C to +125°C Storage Temperature Range . –65
FOR DIP, SOIC AND SSOP
°C to +150°C Junction Temperature . +150°C
CONVST 1 28 BUSY
Cerdip Package, Power Dissipation . 450 mW
WR 2 27 CLKIN
θJA Thermal Impedance . 75°C/W
RD 3 26 DB11
Lead Temperature, (Soldering, 10 secs) . +300°C
CS 4 25 DB10
SOIC, SSOP Package, Power Dissipation . 450 mW
5 24 REF DB9
θJA Thermal Impedance . 75°C/W (SOIC) 115°C/W (SSOP)
IN/REFOUT AD7854 AV 6 DD TOP VIEW 23 DGND
θJC Thermal Impedance . 25°C/W (SOIC) 35°C/W (SSOP)
(Not to Scale) AGND 7 22
Lead Temperature, Soldering
DVDD 8 C 21
Vapor Phase (60 secs) . +215
DB8
°C
REF1 C 9 20 DB7
Infrared (15 secs) . +220
REF2
°C
AIN(+) 10 19 DB6
NOTES 1
AIN(–) 11 18 DB5
Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the
HBEN 12 17 DB4
device at these or any other conditions above those listed in the operational
DB0 13 16 DB3
sections of this specification is not implied. Exposure to absolute maximum rating
DB1 14 15 DB2
conditions for extended periods may affect device reliability. 2Transient currents of up to 100 mA will not cause SCR latchup.
ORDERING GUIDE Linearity Power Temperature Error Dissipation Package Model Range1 (LSB) (mW) Option2
AD7854AQ –40°C to +85°C 1 15 Q-28 AD7854SQ –55°C to +125°C 1 15 Q-28 AD7854AR –40°C to +85°C 1 15 R-28 AD7854BR –40°C to +85°C 1/2 15 R-28 AD7854ARS –40°C to +85°C 1 15 RS-28 AD7854LAQ3 –40°C to +85°C 1 5.5 Q-28 AD7854LAR3 –40°C to +85°C 1 5.5 R-28 AD7854LARS3 –40°C to +85°C 1 5.5 RS-28 EVAL-AD7854CB4 EVAL-CONTROL BOARD5 NOTES 1Linearity error refers to the integral linearity error. 2Q = Cerdip; R = SOIC; RS = SSOP. 3L signifies the low power version. 4This can be used as a stand-alone evaluation board or in conjunction with the EVAL-CONTROL BOARD for evaluation/demonstration purposes. 5This board is a complete unit allowing a PC to control and communicate with all Analog Devices evaluation boards ending in the CB designator. For more information on Analog Devices products and evaluation boards visit our World Wide Web home page at http://www.analog.com. REV. B –5–
