Datasheet AD7716 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | CMOS, 4-Channel, 22-Bit Data Acquisition System |
| Pages / Page | 17 / 3 — AD7716–SPECIFICATIONS1, 2 (fCLKIN = 8 MHz; MODE Pin Is High (Slave Mode … |
| Revision | A |
| File Format / Size | PDF / 473 Kb |
| Document Language | English |
AD7716–SPECIFICATIONS1, 2 (fCLKIN = 8 MHz; MODE Pin Is High (Slave Mode Operation); AVDD = DVDD = +5 V. 5%; AVSS = –5 V
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Text Version of Document
AD7716–SPECIFICATIONS1, 2 (fCLKIN = 8 MHz; MODE Pin Is High (Slave Mode Operation); AVDD = DVDD = +5 V
6
5%; AVSS = –5 V
6
5%; AGND = DGND = 0 V; VREF = 2.5 V; Filter Cutoff = 146 Hz; Noise Measurement Bandwidth = 146 Hz; AIN Source Resistance = 750
V
2 with 1 nF to AGND at each AIN. TA = TMIN to TMAX, unless otherwise noted.) Parameter B Version Units Test Conditions/Comments
STATIC PERFORMANCE Resolution 22 Bits Integral Linearity Error 0.003 % FSR typ Guaranteed No Missed Codes to 21 Bits3 0.006 % FSR max Gain Error 1 % FSR max Gain Match Between Channels 0.5 % FSR max Gain TC 30 µV/°C typ Offset Error 0.2 % FSR max Offset Match Between Channels 0.1 % FSR max Offset TC 4 µV/°C typ Noise 11 µV rms max See Table I for Typical Noise Performance vs. Programmed Cutoff Frequency DYNAMIC PERFORMANCE Sampling Rate fCLKIN/14 570 kHz for fCLKIN = 8 MHz Output Update Rate fCLKIN/(14 3 256 3 2N) N Is Decimal Equivalent of FC2, FC1, FC0 in Control Register Filter Cutoff Frequency fCLKIN/(3.81 3 14 3 256 3 2N) Settling Time (3 3 14 3 256 3 2N/fCLKIN) Usable Dynamic Range4 See Table I Total Harmonic Distortion –90 dB typ Input Frequency = 35 Hz –100 dB typ AIN = ± 10 mV p-p Absolute Group Delay3 (3 3 14 3 256 3 2N)/2fCLKIN Differential Group Delay3 10 ns typ Channel-to-Channel Isolation –85 dB typ Feedthrough from Any One Channel to the Other Three, with 35 Hz Full-Scale Sine Wave Applied to that Channel ANALOG INPUT Input Range ±2.5 Volts Input Capacitance 10 pF typ Input Bias Current 1 nA typ LOGIC INPUTS VINH, Input High Voltage 2.4 V min VINL, Input Low Voltage 0.8 V max IIN, Input Current SDATA, RFS +10/-130 µA max Internal 50 kΩ Pull-Up Resistors TFS +10/-650 µA max Internal 10 kΩ Pull-Up Resistor All Other Inputs ±10 µA max CIN, Input Capacitance3 10 pF max LOGIC OUTPUTS VOH, Output High Voltage 2.4 V min |IOUT| ≤ 40 µA VOL, Output Low Voltage 0.4 V max |IOUT| ≤ 1.6 mA POWER SUPPLIES Reference Input 2.4/2.6 V min/V max AVDD 4.75/5.25 V min/V max DVDD 4.75/5.25 V min/V max AVSS –4.75/–5.25 V min/V max IDD 7.5 mA max 4.8 mA typ ISS 2.5 mA max 1.8 mA typ Power Consumption 50 mW max 35 mW typ Power Supply Rejection5 –70 dB typ NOTES 1Operating temperature ranges as follows : B Version; –40°C to +85°C. 2The AIN pins present a very high impedance dynamic load which varies with clock frequency. 3Guaranteed by design and characterization. Digital filter has linear phase. 4Usable dynamic range is guaranteed by measuring noise and relating this to the full-scale input range. 5100 mV p-p, 120 Hz sine wave applied to each supply. Specifications subject to change without notice. –2– REV. A
6
5%; AVSS = –5 V
6
5%; AGND = DGND = 0 V; VREF = 2.5 V; Filter Cutoff = 146 Hz; Noise Measurement Bandwidth = 146 Hz; AIN Source Resistance = 750
V
2 with 1 nF to AGND at each AIN. TA = TMIN to TMAX, unless otherwise noted.) Parameter B Version Units Test Conditions/Comments
STATIC PERFORMANCE Resolution 22 Bits Integral Linearity Error 0.003 % FSR typ Guaranteed No Missed Codes to 21 Bits3 0.006 % FSR max Gain Error 1 % FSR max Gain Match Between Channels 0.5 % FSR max Gain TC 30 µV/°C typ Offset Error 0.2 % FSR max Offset Match Between Channels 0.1 % FSR max Offset TC 4 µV/°C typ Noise 11 µV rms max See Table I for Typical Noise Performance vs. Programmed Cutoff Frequency DYNAMIC PERFORMANCE Sampling Rate fCLKIN/14 570 kHz for fCLKIN = 8 MHz Output Update Rate fCLKIN/(14 3 256 3 2N) N Is Decimal Equivalent of FC2, FC1, FC0 in Control Register Filter Cutoff Frequency fCLKIN/(3.81 3 14 3 256 3 2N) Settling Time (3 3 14 3 256 3 2N/fCLKIN) Usable Dynamic Range4 See Table I Total Harmonic Distortion –90 dB typ Input Frequency = 35 Hz –100 dB typ AIN = ± 10 mV p-p Absolute Group Delay3 (3 3 14 3 256 3 2N)/2fCLKIN Differential Group Delay3 10 ns typ Channel-to-Channel Isolation –85 dB typ Feedthrough from Any One Channel to the Other Three, with 35 Hz Full-Scale Sine Wave Applied to that Channel ANALOG INPUT Input Range ±2.5 Volts Input Capacitance 10 pF typ Input Bias Current 1 nA typ LOGIC INPUTS VINH, Input High Voltage 2.4 V min VINL, Input Low Voltage 0.8 V max IIN, Input Current SDATA, RFS +10/-130 µA max Internal 50 kΩ Pull-Up Resistors TFS +10/-650 µA max Internal 10 kΩ Pull-Up Resistor All Other Inputs ±10 µA max CIN, Input Capacitance3 10 pF max LOGIC OUTPUTS VOH, Output High Voltage 2.4 V min |IOUT| ≤ 40 µA VOL, Output Low Voltage 0.4 V max |IOUT| ≤ 1.6 mA POWER SUPPLIES Reference Input 2.4/2.6 V min/V max AVDD 4.75/5.25 V min/V max DVDD 4.75/5.25 V min/V max AVSS –4.75/–5.25 V min/V max IDD 7.5 mA max 4.8 mA typ ISS 2.5 mA max 1.8 mA typ Power Consumption 50 mW max 35 mW typ Power Supply Rejection5 –70 dB typ NOTES 1Operating temperature ranges as follows : B Version; –40°C to +85°C. 2The AIN pins present a very high impedance dynamic load which varies with clock frequency. 3Guaranteed by design and characterization. Digital filter has linear phase. 4Usable dynamic range is guaranteed by measuring noise and relating this to the full-scale input range. 5100 mV p-p, 120 Hz sine wave applied to each supply. Specifications subject to change without notice. –2– REV. A
