Datasheet AD7880 (Analog Devices) - 3

ManufacturerAnalog Devices
DescriptionCMOS, Single +5 V Supply, Low Power, 12-Bit Sampling ADC
Pages / Page17 / 3 — AD7880–SPECIFICATIONS (VDD = +5 V. 5%, VREF = VDD, AGND = DGND = O V, …
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AD7880–SPECIFICATIONS (VDD = +5 V. 5%, VREF = VDD, AGND = DGND = O V, fCLKIN = 2.5 MHz, MODE = VDD

AD7880–SPECIFICATIONS (VDD = +5 V 5%, VREF = VDD, AGND = DGND = O V, fCLKIN = 2.5 MHz, MODE = VDD

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AD7880–SPECIFICATIONS (VDD = +5 V
6
5%, VREF = VDD, AGND = DGND = O V, fCLKIN = 2.5 MHz, MODE = VDD unless otherwise noted. All Specifications TMIN to TMAX unless otherwise noted.) Parameter B Versions1 C Versions1 Units Test Conditions/Comments
DYNAMIC PERFORMANCE2 Signal-to-Noise Ratio3 (SNR) 70 70 dB min Typically SNR Is 72 dB VIN = 1 kHz Sine Wave, fSAMPLE = 66 kHz Total Harmonic Distortion (THD) –80 –80 dB typ VIN = 1 kHz Sine Wave, fSAMPLE = 66 kHz Peak Harmonic or Spurious Noise –80 –80 dB typ VIN = 1 kHz, fSAMPLE = 66 kHz Intermodulation Distortion (IMD) Second Order Terms –80 –80 dB typ fa = 0.983 kHz, fb = 1.05 kHz, fSAMPLE = 66 kHz Third Order Terms –80 –80 dB typ fa = 0.983 kHz, fb = 1.05 kHz, fSAMPLE = 66 kHz DC ACCURACY Resolution 12 12 Bits All DC ACCURACY Specifications Apply for the Three Analog Input Ranges Integral Nonlinearity ±1 ±1 LSB max Differential Nonlinearity ±1 ±1 LSB max Guaranteed Monotonic Full-Scale Error ±15 ±5 LSB max Bipolar Zero Error ±10 ±5 LSB max Unipolar Offset Error ±5 ±5 LSB max ANALOG INPUT Input Voltage Ranges 0 to VREF 0 to VREF Volts See Figure 5 0 to 2 VREF 0 to 2 VREF Volts See Figure 6 ±V ± REF VREF Volts See Figure 7 Input Resistance 10 10 MΩ min 0 to VREF Range 5/12 5/12 kΩ min/max 8 kΩ typical: 0 to 2 VREF Range 5/12 5/12 kΩ min/max 8 kΩ typical: ± VREF Range REFERENCE INPUT VREF (For Specified Performance) 5 5 V ±5%: Normally VREF = VDD (See Reference Input Section) IREF 1.5 1.5 mA max Nominal Reference Range 2.5/VDD 2.5/VDD V min/max See Figure 3 for Degradation in Performance Down to 2.5 V LOGIC INPUTS CONVST, RD, CS, CLKIN Input High Voltage, VINH 2.4 2.4 V min Input Low Voltage, VINL 0.8 0.8 V max Input Current, I ± IN 10 ±10 µA max VIN = 0 V or VDD Input Capacitance, C 4 IN 10 10 pF max MODE INPUT Input High Voltage, VINH 4 4 V min Input Low Voltage, VINL 1 1 V max Input Current, I ± IN 125 ±125 µA max VIN = 0 V or VDD Input Capacitance, C 4 IN 10 10 pF max LOGIC OUTPUTS DB11–DB0, BUSY Output High Voltage, VOH 4.0 4.0 V min ISOURCE = 400 µA Output Low Voltage, VOL 0.4 0.4 V max ISINK = 1.6 mA DB11–DB0 Floating-State Leakage Current ±10 ±10 µA max Floating-State Output Capacitance4 10 10 pF max CONVERSION Conversion Time 12 12 µs max fCLKIN = 2.5 MHz Track/Hold Acquisition Time 3 3 µs max POWER REQUIREMENTS VDD +5 +5 V nom ±5% for Specified Performance IDD Normal Power Mode @ +25°C 7.5 7.5 mA max Typically 4 mA; MODE = VDD TMIN to TMAX 10 10 mA max Typically 5 mA; MODE = VDD Power Save Mode @ +25°C 750 750 µA max Logic Inputs @ 0 V or VDD; MODE = 0 V TMIN to TMAX 1 1 mA max Logic Inputs @ 0 V or VDD; MODE = 0 V Power Dissipation Normal Power Mode @ +25°C 37.5 37.5 mW max VDD = 5 V: Typically 20 mW; MODE = VDD TMIN to TMAX 50 50 mW max VDD = 5 V: Typically 25 mW; MODE = VDD Power Save Mode @ +25°C 3.75 3.75 mW max VDD = 5 V: Typically 2 mW; MODE = 0 V TMIN to TMAX 5 5 mW max VDD = 5 V: Typically 2.5 mW; MODE = 0 V NOTES 1Temperature ranges are as follows: B/C Versions, –40°C to +85°C. 2VIN = 0 to VREF 3SNR calculation includes distortion and noise components. 4Sample tested @ +25°C to ensure compliance. Specifications subject to change without notice. –2– REV. 0