Datasheet AD7874 (Analog Devices) - 7

ManufacturerAnalog Devices
Description4-channel Simultaneous Sampling, 12-Bit Data Acquisition System
Pages / Page17 / 7 — AD7874. CONVERTER DETAILS. EXTERNAL REFERENCE. 15V. +VIN. VIN1. 7R*. TO …
RevisionC
File Format / SizePDF / 454 Kb
Document LanguageEnglish

AD7874. CONVERTER DETAILS. EXTERNAL REFERENCE. 15V. +VIN. VIN1. 7R*. TO INTERNAL. GND. COMPARATOR. VOUT. TRACK/HOLD 1. AD586. 10k. 2.1R*. 3R*. REF

AD7874 CONVERTER DETAILS EXTERNAL REFERENCE 15V +VIN VIN1 7R* TO INTERNAL GND COMPARATOR VOUT TRACK/HOLD 1 AD586 10k 2.1R* 3R* REF

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AD7874 CONVERTER DETAILS EXTERNAL REFERENCE
The AD7874 is a complete 12-bit, 4-channel data acquisition In some applications, the user may require a system reference or system. It is comprised of a 12-bit successive approximation some other external reference to drive the AD7874 reference in- ADC, four high speed track/hold circuits, a four-channel analog put. Figure 4 shows how the AD586 5 V reference can be used multiplexer and a 3 V Zener reference. The ADC uses a succes- to provide the 3 V reference required by the AD7874 REF IN. sive approximation technique and is based on a fast-settling, voltage switching DAC, a high speed comparator, a fast CMOS
15V +
SAR and high speed logic.
+VIN VIN1 7R* TO INTERNAL
Conversion is initiated on the rising edge of CONVST. All four
GND COMPARATOR
input track/holds go from track to hold on this edge. Conversion
VOUT TRACK/HOLD 1 AD586
is first performed on the Channel 1 input voltage, then Channel
10k
Ω 2 is converted and so on. The four results are stored in on-chip
2.1R* 3R* REF
registers. When all four conversions have been completed, INT
IN
goes low indicating that data can be read from these locations.
1k
Ω The conversion sequence takes either 78 or 79 rising clock edges
TO ADC
depending on the synchronization of CONVST with CLK. In-
REFERENCE
ternal delays and reset times bring the total conversion time
15k

CIRCUITRY
from CONVST going high to INT going low to 32.5 µs maxi-
AGND
mum for a 2.5 MHz external clock. The AD7874 uses an im-
AD7874**
plicit addressing scheme whereby four successive reads to the same memory location access the four data words sequentially.
*R = 3.6k

TYP
The first read accesses Channel 1 data, the second read accesses
**ADDITIONAL PINS OMITTED FOR CLARITY
Channel 2 data and so on. Individual data registers cannot be Figure 4. AD586 Driving AD7874 REF IN accessed independently.
TRACK-AND-HOLD AMPLIFIER INTERNAL REFERENCE
The track-and-hold amplifier on each analog input of the The AD7874 has an on-chip temperature compensated buried AD7874 allows the ADC to accurately convert an input sine Zener reference which is factory trimmed to 3 V ± 10 mV (see wave of 20 V p-p amplitude to 12-bit accuracy. The input band- Figure 3). The reference voltage is provided at the REF OUT width of the track/hold amplifier is greater than the Nyquist rate pin. This reference can be used to provide both the reference of the ADC even when the ADC is operated at its maximum voltage for the ADC and the bipolar bias circuitry. This is throughput rate. The small signal 3 dB cutoff frequency occurs achieved by connecting REF OUT to REF IN. typically at 500 kHz.
V
The four track/hold amplifiers sample their respective input
DD
channels simultaneously. The aperture delay of the track/hold circuits is small and, more importantly, is well matched across the four track/holds on one device and also well matched from
TEMPERATURE
device to device. This allows the relative phase information be-
COMPENSATION
tween different input channels to be accurately preserved. It also allows multiple AD7874s to sample more than four channels simultaneously.
AD7874
The operation of the track/hold amplifiers is essentially transpar-
VSS
ent to the user. Once conversion is initiated, the four channels
REF OUT
are automatically converted and there is no need to select which channel is to be digitized. Figure 3. AD7874 Internal Reference The reference can also be used as a reference for other compo-
ANALOG INPUT
nents and is capable of providing up to 500 µA to an external The analog input of Channel 1 of the AD7874 is as shown in load. In systems using several AD7874s, using the REF OUT of Figure 4. The analog input range is ± 10 V into an input resis- one device to provide the REF IN for the other devices ensures tance of typically 30 kΩ. The designed code transitions occur good full-scale tracking between all the AD7874s. Because the midway between successive integer LSB values (i.e., 1/2 LSB, AD7874 REF IN is buffered, each AD7874 presents a high im- 3/2 LSBs, 5/2 LSBs, . FS – 3/2 LSBs). The output code is pedance to the reference so one AD7874 REF OUT can drive 2s complement binary with 1 LSB = FS/4096 = 20 V/4096 = several AD7874 REF INs. 4.88 mV. The ideal input/output transfer function is shown in Figure 5. The maximum recommended capacitance on REF OUT for normal operation is 50 pF. If the reference is required for other system uses, it should be decoupled to AGND with a 200 Ω re- sistor in series with a parallel combination of a 10 µF tantalum capacitor and a 0.1 µF ceramic capacitor. –6– REV. C