link to page 1 link to page 1 link to page 1 link to page 1 link to page 4 link to page 5 link to page 6 link to page 6 link to page 8 link to page 9 link to page 10 link to page 10 link to page 12 link to page 13 link to page 15 link to page 15 link to page 16 link to page 19 link to page 20 link to page 23 link to page 23 link to page 23 link to page 24 link to page 24 link to page 27 link to page 27 link to page 27 link to page 27 link to page 27 link to page 27 link to page 27 link to page 28 link to page 28 link to page 30 link to page 32 link to page 33 link to page 35 link to page 35 link to page 35 link to page 36 link to page 37 link to page 37 link to page 38 link to page 38 link to page 39 link to page 40 link to page 41 link to page 41 AD5380Data SheetTABLE OF CONTENTS Features .. 1 RESET Function ... 26 Integrated Functions .. 1 Asynchronous Clear Function .. 26 Applications ... 1 BUSY and LDAC Functions.. 26 Functional Block Diagram .. 1 FIFO Operation in Parallel Mode .. 26 Revision History ... 3 Power-On Reset .. 26 General Description ... 4 Power-Down ... 26 Specifications ... 5 AD5380 Interfaces .. 27 AD5380-5 Specifications ... 5 DSP-, SPI-, Microwire-Compatible Serial Interfaces .. 27 AD5380-3 Specifications ... 7 I2C Serial Interface ... 29 AC Characteristics .. 8 Parallel Interface ... 31 Timing Characteristics ... 9 Microprocessor Interfacing ... 32 Serial Interface .. 9 Applications Information .. 34 I2C Serial Interface .. 11 Power Supply Decoupling ... 34 Parallel Interface ... 12 Power Supply Sequencing ... 34 Absolute Maximum Ratings .. 14 Typical Configuration Circuit .. 35 ESD Caution .. 14 AD5380 Monitor Function ... 36 Pin Configuration and Function Descriptions ... 15 Toggle Mode Function ... 36 Terminology .. 18 Thermal Monitor Function ... 37 Typical Performance Characteristics ... 19 AD5380 in a MEMS Based Optical Switch ... 37 Functional Description .. 22 Optical Attenuators .. 38 DAC Architecture—General ... 22 Utilizing the AD5380 FIFO .. 39 Data Decoding .. 22 Outline Dimensions ... 40 On-Chip Special Function Registers (SFR) .. 23 Ordering Guide .. 40 SFR Commands .. 23 Hardware Functions ... 26 Rev. D | Page 2 of 40 Document Outline Features Integrated Functions Applications Functional Block Diagram Table Of Contents Revision History General Description Specifications AD5380-5 Specifications AD5380-3 Specifications AC Characteristics Timing Characteristics Serial Interface I2C Serial Interface Parallel Interface Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Functional Description DAC Architecture—General Data Decoding On-Chip Special Function Registers (SFR) SFR Commands NOP (No Operation) Write CLR Code Soft CLR Soft Power-Down Soft Power-Up Soft RESET Control Register Write/Read Control Register Contents Channel Monitor Function Hardware Functions RESET\ Function Asynchronous Clear Function BUSY\ and LDAC\ Functions FIFO Operation in Parallel Mode Power-On Reset Power-Down AD5380 Interfaces DSP-, SPI-, Microwire-Compatible Serial Interfaces Standalone Mode Daisy-Chain Mode Readback Mode I2C Serial Interface I2C Data Transfer START and STOP Conditions Repeated START Conditions Acknowledge Bit (ACK) AD5380 Slave Addresses Write Operation 4-Byte Mode 3-Byte Mode 2-Byte Mode Parallel Interface CS\ Pin WR\ Pin REG0, REG1 Pins Pins A5 to A0 Pins DB13 to DB0 Microprocessor Interfacing Parallel Interface AD5380 to MC68HC11 AD5380 to PIC16C6x/7x AD5380 to 8051 AD5380 to ADSP-BF527 Applications Information Power Supply Decoupling Power Supply Sequencing Typical Configuration Circuit AD5380 Monitor Function Toggle Mode Function Thermal Monitor Function AD5380 in a MEMS Based Optical Switch Optical Attenuators Utilizing the AD5380 FIFO Outline Dimensions Ordering Guide