Datasheet AD557 (Analog Devices) - 5

AD557 APPLICATIONS Timing and Control Grounding and Bypassing
The AD557 has data input latches that simplify interface to 8- All precision converter products require careful application of and 16-bit data buses. These latches are controlled by Chip good grounding practices to maintain full rated performance. Enable (CE) and Chip Select (CS) inputs. CE and CS are inter- Because the AD557 is intended for application in microcom- nally “NORed” so that the latches transmit input data to the puter systems where digital noise is prevalent, special care must DAC section when both CE and CS are at Logic “0.” If the be taken to assure that its inherent precision is realized. application does not involve a data bus, a “00” condition allows for direct operation of the DAC. When either CE or CS go to The AD557 has two ground (common) pins; this minimizes Logic “1,” the input data is latched into the registers and held ground drops and noise in the analog signal path. Figure 4 until both CE and CS return to “0.” (Unused CE or CS inputs shows how the ground connections should be made. should be tied to ground.) The truth table is given in Table I. It is often advisable to maintain separate analog and digital The logic function is also shown in Figure 6. grounds throughout a complete system, tying them common in one place only. If the common tie-point is remote and acciden-
VOUT 7.5
tal disconnection of that one common tie-point occurs due to card removal with power on, a large differential voltage between
5.0
the two commons could develop. To protect devices that inter-
2.5
face to both digital and analog parts of the system, such as the
00H 80H FFH
AD557, it is recommended that common ground tie-points
AD557 INPUT CODE
should be provided at each such device. If only one system Figure 6. AD557 Input Code vs. Level Shifted Output in a ground can be connected directly to the AD557, it is recom- “False” Ground Configuration mended that analog common be selected.
Table I. AD557 Control Logic Truth Table Latch OUTPUT AMP Input Data CE CS DAC Data Condition VOUT 16
0 0 0 0 “Transparent”
VOUT SENSE A 15
1 0 0 1 “Transparent”
VOUT SENSE B
0 g 0 0 Latching
14 RL
1 g 0 1 Latching
GND 13
0 0 g 0 Latching
TO SYSTEM GND
1 0 g 1 Latching
12 GND TO SYSTEM GND
X 1 X Previous Data Latched
0.1
␮
F (SEE TEXT)
X X 1 Previous Data Latched
11 TO SYSTEM V +V CC CC
NOTES X = Does not matter Figure 4. Recommended Grounding and Bypassing g = Logic Threshold at Positive-Going Transition
Using a “False” Ground
In a level-triggered latch such as that used in the AD557, there Many applications, such as disk drives, require servo control is an interaction between the data setup and hold times and voltages that swing on either side of a “false” ground. This the width of the enable pulse. In an effort to reduce the time ground is usually created by dividing the 12 V supply equally required to test all possible combinations in production, the and calling the midpoint voltage “ground.” AD557 is tested with tDS = tW = 225 ns at 25°C and 300 ns at TMIN and TMAX, with tDH = 10 ns at all temperatures. Failure to Figure 5 shows an easy and inexpensive way to implement this. comply with these specifications may result in data not being The AD586 is used to provide a stable 5 V reference from the latched properly. system’s 12 V supply. The op amp shown likewise operates from a single (12 V) supply available in the system. The resulting out- Figure 7 shows the timing for the data and control signals, CE put at the V and CS are identical in timing as well as in function. OUT node is ± 2.5 V around the “false” ground point of 5 V. AD557 input code vs. VOUT is shown in Figure 6.
tDH DATA 2.0V tDS INPUTS 0.8V 100k
⍀
200k
⍀
AD557 2.0V 1/4 LM324 CS OR CE 0.8V tW VOUT DAC 1/2 LSB 12V 100k
⍀
V OUTPUT 6 2 AD586 5V VIN 100k
⍀
“FALSE” 4 tSETTLING GROUND tW = STROBE PULSEWIDTH = 225ns min tDH = DATA HOLD TIME = 10ns min
Figure 5. Level Shifting the AD557 Output Around a
tDS = DATA SETUP TIME = 225ns min tSETTLING = DAC SETTLING TIME TO
ⴞ
1/2 LSB
“False” Ground Figure 7. AD557 Timing –4– REV. B