link to page 16 link to page 16 Data SheetADA4937-1/ADA4937-2SPECIFICATIONS 5 V OPERATION TA = 25°C, +VS = 5 V, −VS = 0 V, VOCM = +VS/2, RT = 61.9 Ω, RG = RF = 200 Ω, Gain (G) = +1, RL, dm = 1 kΩ, unless otherwise noted. All specifications refer to single-ended input and differential outputs, unless otherwise noted. ±DIN to ±OUT PerformanceTable 1. ParameterTest Conditions/CommentsMinTypMaxUnit DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth VOUT, dm = 0.1 V p-p 1900 MHz Bandwidth for 0.1 dB Flatness VOUT, dm = 0.1 V p-p 200 MHz Large Signal Bandwidth VOUT, dm = 2 V p-p 1700 MHz Slew Rate VOUT, dm = 2 V p-p; 25% to 75% 6000 V/µs Settling Time VOUT, dm = 2 V p-p 7 ns Overdrive Recovery Time VIN = 0 V to 1.5 V step; G = 3.16 <1 ns NOISE/HARMONIC PERFORMANCE See Figure 51 for distortion test circuit Second Harmonic VOUT, dm = 2 V p-p; 10 MHz −112 dBc VOUT, dm = 2 V p-p; 70 MHz −84 dBc VOUT, dm = 2 V p-p; 100 MHz −77 dBc Third Harmonic VOUT, dm = 2 V p-p; 10 MHz −102 dBc VOUT, dm = 2 V p-p; 70 MHz −91 dBc VOUT, dm = 2 V p-p; 100 MHz −84 dBc IMD f1 = 70 MHz; f2 = 70.1 MHz; VOUT, dm = 2 V p-p −91 dBc Voltage Noise (RTI) f = 100 kHz 2.2 nV/√Hz Input Current Noise f = 100 kHz 4 pA/√Hz Noise Figure G = 4; RT = 136 Ω; RF = 200 Ω; RG = 37 Ω; f = 100 MHz 15 dB Crosstalk (ADA4937-2) f = 100 MHz −72 dB INPUT CHARACTERISTICS Offset Voltage VOS, dm = VOUT, dm/2; VDIN+ = VDIN− = 2.5 V −2.5 ±0.5 +2.5 mV TMIN to TMAX variation ±1 µV/°C Input Bias Current −50 −30 −10 µA TMIN to TMAX variation 0.01 µA/°C Input Offset Current −2 +0.5 +2 µA Input Resistance Differential 6 MΩ Common mode 3 MΩ Input Capacitance 1 pF Input Common-Mode Voltage 0.3 to 3.0 V CMRR ∆VOUT, dm/∆VIN, cm; ∆VIN, cm = ±1 V −69 −80 dB OUTPUT CHARACTERISTICS Output Voltage Swing Maximum ∆VOUT; single-ended output; RF = RG = 10 kΩ 0.9 4.1 V Linear Output Current Per amplifier; RL, dm = 20 Ω; f = 10 MHz ±70 mA Output Balance Error ∆VOUT, cm/∆VOUT, dm; ∆VOUT, dm = 1 V; f = 10 MHz; −61 dB see Figure 50 for test circuit Rev. F | Page 3 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS REVISION HISTORY SPECIFICATIONS 5 V OPERATION ±DIN to ±OUT Performance VOCM to ±OUT Performance 3.3 V OPERATION ±DIN to ±OUT Performance VOCM to ±OUT Performance ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Maximum Power Dissipation ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION ANALYZING AN APPLICATION CIRCUIT SETTING THE CLOSED-LOOP GAIN ESTIMATING THE OUTPUT NOISE VOLTAGE IMPACT OF MISMATCHES IN THE FEEDBACK NETWORKS CALCULATING THE INPUT IMPEDANCE FOR AN APPLICATION CIRCUIT Terminating a Single-Ended Input INPUT COMMON-MODE VOLTAGE RANGE IN SINGLE-SUPPLY APPLICATIONS SETTING THE OUTPUT COMMON-MODE VOLTAGE POWER-DOWN OPERATION LAYOUT, GROUNDING, AND BYPASSING HIGH PERFORMANCE ADC DRIVING 3.3 V OPERATION OUTLINE DIMENSIONS ORDERING GUIDE