AD8227TYPICAL PERFORMANCE CHARACTERISTICS T = 25°C, VS = ±15 V, RL = 10 kΩ, unless otherwise noted. 500MEAN: 15.9MEAN: 0.0668SD: 196.50SD: 0.0658271000400800300SSTT 600HIHI2004001002000 3 0 6 –900–600–3000300600900 00 –0.9–0.6–0.300.30.60.9 00 9- 9- OUTPUT V 75 75 OS (µV)INPUT V 07 OS DRIFT (µV) 07 Figure 3. Typical Distribution of Output Offset Voltage Figure 6. Typical Distribution of Input Offset Voltage Drift, G = 100 MEAN: –0.701MEAN: 20.4700SD: 0.6769121000SD: 0.5893600800500S600400STTHIHI3004002002001000 4 0 7 –6–4–20246 00 161820222426 00 9- 9- OUTPUT V 75 75 OS DRIFT (µV)POSITIVE I 07 BIAS (nA) 07 Figure 4. Typical Distribution of Output Offset Voltage Drift Figure 7. Typical Distribution of Input Bias Current MEAN: –5.90MEAN: –0.0271000SD: 15.88251000SD: 0.079173800800600SS 600TTHIHI4004002002000 5 0 8 –200–150–100–50050100150200 00 –0.9–0.6–0.300.30.60.9 00 9- 9- INPUT V 75 75 OS (µV)I 07 OS (nA) 07 Figure 5. Typical Distribution of Input Offset Voltage Figure 8. Typical Distribution of Input Offset Current Rev. 0 | Page 9 of 24 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE GAIN SELECTION REFERENCE TERMINAL INPUT VOLTAGE RANGE LAYOUT Common-Mode Rejection Ratio over Frequency Power Supplies References INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION RADIO FREQUENCY INTERFERENCE (RFI) APPLICATIONS INFORMATION DIFFERENTIAL DRIVE Tips for Best Differential Output Performance PRECISION STRAIN GAGE DRIVING AN ADC OUTLINE DIMENSIONS ORDERING GUIDE