link to page 19 link to page 19 link to page 19 link to page 19 link to page 18 link to page 18 link to page 20 link to page 17 link to page 17 ADL5902Data SheetPIN CONFIGURATION AND FUNCTION DESCRIPTIONSILOHNCININNCPIN 1INDICATOR16151413TADJ/PWDN 112 VTGTNC 211 VREFADL5902VPOS 3TOP VIEW10 VPOS(Not to Scale)COMM 49COMM5678FTPPUMCLVOVSETTENOTES 1. NC = NO CONNECT. 2. THE EXPOSED PAD IS COMM AND SHOULD 2 -00 HAVE BOTH A GOOD THERMAL AND GOOD 218 ELECTRICAL CONNECTION TO GROUND. 08 Figure 2. Pin Configuration Table 3. Pin Function Descriptions Pin No.MnemonicDescription 1 TADJ/PWDN This is a dual function pin used for controlling the amount of nonlinear intercept temperature compensation at voltages <2.5 V and/or for shutting down the device at voltages >4 V. If the shutdown function is not used, this pin can be connected to the VREF pin through a voltage divider. See Figure 41 for an equivalent circuit. 2 NC No Connect. Do not connect this pin. 3, 10 VPOS Supply for the Device. Connect this pin to a 5 V power supply. Pin 3 and Pin 10 are not internally connected; therefore, both must connect to the source. 4, 9, EPAD COMM System Common Connection. Connect these pins via low impedance to system common. The exposed paddle is also COMM and must have both a good thermal and good electrical connection to ground. 5 CLPF Connection for RMS Averaging Capacitor. Connect a ground-referenced capacitor to this pin. A resistor can be connected in series with this capacitor to modify loop stability and response time. See Figure 43 for an equivalent circuit. 6 VOUT Output. In measurement mode, this pin is connected to VSET. In controller mode, this pin can drive a gain control element. See Figure 43 for an equivalent circuit. 7 VSET The voltage applied to this pin sets the decibel value of the required RF input voltage that results in zero current flow in the loop integrating capacitor pin, CLPF. This pin controls the variable gain amplifier (VGA) gain such that a 50 mV change in VSET changes the gain by approximately 1 dB. See Figure 42 for an equivalent circuit. 8 TEMP Temperature Sensor Output of 1.4 V at 25°C with a Coefficient of 5 mV/°C. See Figure 38 for an equivalent circuit. 11 VREF General-Purpose Reference Voltage Output of 2.3 V at 25°C. See Figure 39 for an equivalent circuit. 12 VTGT The voltage applied to this pin determines the target power at the input of the RF squaring circuit. The intercept voltage is proportional to the voltage applied to this pin. The use of a lower target voltage increases the crest factor capacity; however, this can affect the system loop response. See Figure 44 for an equivalent circuit. 13 NC No Connect. Do not connect this pin. 14 INHI RF Input. The RF input signal is normally ac-coupled to this pin through a coupling capacitor. See Figure 37 for an equivalent circuit. 15 INLO RF Input Common. This pin is normally ac-coupled to ground through a coupling capacitor. See Figure 37 for an equivalent circuit. 16 NC No Connect. Do not connect this pin. Rev. B | Page 8 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SQUARE LAW DETECTOR AND AMPLITUDE TARGET RF INPUT INTERFACE SMALL SIGNAL LOOP RESPONSE TEMPERATURE SENSOR INTERFACE VREF INTERFACE TEMPERATURE COMPENSATION INTERFACE POWER-DOWN INTERFACE VSET INTERFACE OUTPUT INTERFACE VTGT INTERFACE BASIS FOR ERROR CALCULATIONS MEASUREMENT MODE BASIC CONNECTIONS SETTING VTADJ SETTING VTGT CHOOSING A VALUE FOR CLPF OUTPUT VOLTAGE SCALING SYSTEM CALIBRATION AND ERROR CALCULATION HIGH FREQUENCY PERFORMANCE LOW FREQUENCY PERFORMANCE DESCRIPTION OF CHARACTERIZATION EVALUATION BOARD SCHEMATICS AND ARTWORK ASSEMBLY DRAWINGS OUTLINE DIMENSIONS ORDERING GUIDE