Datasheet AD8363 (Analog Devices) - 7

AD8363 Data Sheet Parameter Conditions Min Typ Max Unit
Fall Time Transition from −10 dBm to within 1 dB of final value (that is, 15 µs no input level), CLPF = 390 pF, CHPF = open Noise Spectral Density Measured at 100 kHz 45 nV/√Hz SETPOINT INPUT VSET (Pin 7) Voltage Range Log conformance error ≤ 1 dB, minimum 2.14 GHz 2.0 V Log conformance error ≤ 1 dB, maximum 2.14 GHz 0.7 V Input Resistance 72 kΩ Logarithmic Scale Factor f = 2.14 GHz, −40°C ≤ TA ≤ +85°C 19.2 dB/V Logarithmic Intercept f = 2.14 GHz, −40°C ≤ TA ≤ +85°C, referred to 50 Ω −54 dBm TEMPERATURE COMPENSATION TCM1 (Pin 16), TCM2 (Pin 1) Input Voltage Range 0 2.5 V Input Bias Current, TCM1 VTCM1 = 0 V −140 µA VTCM1 = 0.5 V 80 µA Input Resistance, TCM1 VTCM1 > 0.7 V 5 kΩ Input Current, TCM2 VTCM2 = 5 V 2 µA VTCM2 = 4.5 V 750 µA VTCM2 = 1 V −2 µA VTCM2 = 0 V −3 µA Input Resistance, TCM2 0.7 V ≤ VTCM2 ≤ 4.0 V 500 kΩ VOLTAGE REFERENCE VREF (Pin 11) Output Voltage RFIN = −55 dBm 2.3 V Temperature Sensitivity 25°C ≤ TA ≤ 70°C 0.04 mV/°C 70°C ≤ TA ≤ 125°C −0.06 mV/°C −40°C ≤ TA ≤ +25°C −0.18 mV/°C Current Source/Sink Capability 25°C ≤ TA ≤ 125°C 4/0.05 mA −40°C ≤ TA < +25°C 3/0.05 mA Voltage Regulation TA = 25°C, ILOAD = 3 mA −0.6 % TEMPERATURE REFERENCE TEMP (Pin 8) Output Voltage TA = 25°C, RL ≥ 10 kΩ 1.4 V Temperature Coefficient −40°C ≤ TA ≤ +125°C, RL ≥ 10 kΩ 5 mV/°C Current Source/Sink Capability 25°C ≤ TA ≤ 125°C 4/0.05 mA −40°C ≤ TA < +25°C 3/0.05 mA Voltage Regulation TA = 25°C, ILOAD = 3 mA −0.1 % RMS TARGET INTERFACE VTGT (Pin 12) Input Voltage Range 1.4 2.5 V Input Bias Current VTGT = 1.4 V 14 µA Input Resistance 100 kΩ POWER-DOWN INTERFACE TCM2 (Pin1) Logic Level to Enable VPWDN decreasing 4.2 V Logic Level to Disable VPWDN increasing 4.7 V Input Current VTCM2 = 5 V 2 µA VTCM2 = 4.5 V 750 µA VTCM2 = 1 V −2 µA VTCM2 = 0 V −3 µA Enable Time TCM2 low to VOUT at 1 dB of final value, CLPF = 470 pF, 35 µs CHPF = 220 pF, RFIN = 0 dBm Disable Time TCM2 high to VOUT at 1 dB of final value, CLPF = 470 pF, 25 µs CHPF = 220 pF, RFIN = 0 dBm POWER SUPPLY INTERFACE VPOS (Pin 3, Pin 10) Supply Voltage 4.5 5 5.5 V Quiescent Current TA = 25°C, RFIN = −55 dBm 60 mA TA = 85°C 72 mA Power-Down Current VTCM2 > VPOS − 0.3 V 300 µA Rev. B | Page 6 of 29 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SQUARE LAW DETECTOR AND AMPLITUDE TARGET RF INPUT INTERFACE CHOICE OF RF INPUT PIN SMALL SIGNAL LOOP RESPONSE TEMPERATURE SENSOR INTERFACE VREF INTERFACE TEMPERATURE COMPENSATION INTERFACE POWER-DOWN INTERFACE VSET INTERFACE OUTPUT INTERFACE VTGT INTERFACE MEASUREMENT MODE BASIC CONNECTIONS SYSTEM CALIBRATION AND ERROR CALCULATION OPERATION TO 125°C OUTPUT VOLTAGE SCALING OFFSET COMPENSATION, MINIMUM CLPF, AND MAXIMUM CHPF CAPACITANCE VALUES CHOOSING A VALUE FOR CLPF RF PULSE RESPONSE AND VTGT CONTROLLER MODE BASIC CONNECTIONS CONSTANT OUTPUT POWER OPERATION DESCRIPTION OF RF CHARACTERIZATION EVALUATION AND CHARACTERIZATION CIRCUIT BOARD LAYOUTS ASSEMBLY DRAWINGS OUTLINE DIMENSIONS ORDERING GUIDE