Datasheet LTC6930-X.XX (Analog Devices) - 9

ManufacturerAnalog Devices
Description32.768kHz to 8.192MHz Precision µPower Oscillators
Pages / Page14 / 9 — applicaTions inForMaTion. Start-Up Time. Long-Term Drift. Figure 1. …
File Format / SizePDF / 392 Kb
Document LanguageEnglish

applicaTions inForMaTion. Start-Up Time. Long-Term Drift. Figure 1. Recommended Layout. Switching the DIV Pins

applicaTions inForMaTion Start-Up Time Long-Term Drift Figure 1 Recommended Layout Switching the DIV Pins

Model Line for this Datasheet

LTC6930-4.19
LTC6930-5
LTC6930-7.37
LTC6930-8
LTC6930-8.19
LTC6930-X.XX

Text Version of Document

LTC6930-X.XX
applicaTions inForMaTion
state. The 2ns rise and fall times of the LTC6930 mean that
Start-Up Time
the instantaneous power supply current required during The start-up time of the LTC6930 is typically 50µs from the the rise and fall portions of the waveform is much greater time that valid power is applied to the first output pulse. than the average. The output is held low for the first 50µs to prevent any The instantaneous power supply current may be calculated glitches, runt pulses, or invalid frequency output during by a similar formula: start-up. 1 IPEAK = CLOAD • VSWING • t
Long-Term Drift
rf Long-term stability of silicon oscillators is specified in where trf is the rise/fall time of the signal. In this case, ppm/√kHr, which is typical of other silicon devices such 14mA spikes are generated by driving 5.5V into a 5pF load. as operational amplifiers and voltage references. Because Power is supplied to the output driver of the LTC6930 drift in silicon-based oscillators is generated primarily by from the V+ and GND pins on each side of the output pin movement of ions in the silicon, most of the drift is ac- (Pins 6 and 8). Allowances must be made in the design complished early in the life of the device and the drift can to provide for output load related supply current spikes, be expected to level off in the long term. The ppm/√kHr especially in high accuracy applications. A 0.1µF ceramic unit models this time variant decay. Crystal oscillators capacitor connected between V+ and GND (Pins 6 and 8) are often specified with drift measured in ppm/year be- as close as possible to the device will decouple the rest cause their drift mechanism is different. A comparison of of the circuit from spikes caused by powering a capacitive various drift rates over a five year time period is shown output load of up to 50pF. See Figure 1. in Figure 2. When calculating the amount of drift to be expected, it is important to consider the entire time in the calculation, because the relationship to time is not linear. The drift for C1 V+ 0.1µF C2 0.045 OUT 0.1µF 0.040 GND 0.035 0.030 60ppm/√kHr 0.025 GND 0.020 DRIFT (%) 6930 F01 0.015 30ppm/√kHr 0.010
Figure 1. Recommended Layout
0.005 10ppm/√kHr 0 0 20 40 60 80
Switching the DIV Pins
MONTHS 6930 F02 The LTC6930 is designed to quickly and cleanly respond to the digital inputs. The output will respond to the DIV
Figure 2. 5 Year Drift at Various Rates
pins within a single clock cycle without introducing any sliver or runt pulses. 6930fe For more information www.linear.com/LTC6930 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information AC Electrical Characteristics DC Electrical Characteristics Timing Characteristics Pin Functions Applications Information Package Description Revision History Related Parts