Datasheet LTC4417 (Linear Technology) - 7
| Manufacturer | Linear Technology |
| Description | Prioritized PowerPath Controller |
| Pages / Page | 32 / 7 — pin FuncTions. G1, G2, G3:. V1:. V2:. GND:. HYS:. V3:. OV1, OV2, OV3:. … |
| File Format / Size | PDF / 438 Kb |
| Document Language | English |
pin FuncTions. G1, G2, G3:. V1:. V2:. GND:. HYS:. V3:. OV1, OV2, OV3:. VALID1, VALID2, VALID3:. SHDN:. VS1, VS2, VS3:. UV1, UV2, UV3:. VOUT:
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LTC4417
pin FuncTions G1, G2, G3:
P-Channel MOSFET Gate Drive Outputs. G1,
V1:
Highest Priority Input Supply. When V1 is within its user G2 and G3 are used to control external back-to-back P- defined OV/UV window for 256ms, it is connected to VOUT channel MOSFETs. When driven low, G1, G2 and G3 are via its external back-to-back P-channel MOSFETs. Connect clamped 6V below their corresponding VS1, VS2 and VS3. V1 to ground when channel is not used. See Applications Connect G1, G2 and G3 to external P-channel MOSFET Information for bypass capacitor recommendations. gate pins. See Dual Channel Applications Section for con-
V2:
Second Priority Input Supply. When V2 is within its necting unused channels. OV/UV window for 256ms, it is connected to VOUT via
GND:
Device Ground. its external back-to-back P-channel MOSFETs only if V1
HYS:
OV/UV Comparator Hysteresis Input. Connecting HYS does not meet its OV/UV requirements. Connect to ground to ground sets a fixed 30mV hysteresis for the OV and UV when channel is not used. See Applications Information comparators. Connecting a resistor, R for bypass capacitor recommendations. HYS, between HYS and ground disables the internal 30mV hysteresis and sets
V3:
Third Priority Input Supply. When V3 is within its OV/UV a 63mV/RHYS hysteresis current which is sourced from window for 256ms, it is connected to VOUT via its external each OV1, OV2 and OV3 and sunk into each UV1, UV2 and back-to-back P-channel MOSFETs only if V1 and V2 do UV3 pin. Connect to ground when not used. not meet their OV/UV requirements. Connect to ground
OV1, OV2, OV3:
Overvoltage Comparator Inputs. Rising when channel is not used. See Applications Information voltages above 1V signal an over voltage event, invalidating for bypass capacitor recommendations. the respective input supply channel. Connect OV1, OV2 and
VALID1, VALID2, VALID3:
Valid Channel Indicator Outputs. OV3 to an external resistive divider from its respective V1, VALID1, VALID2 and VALID3 are high voltage open drain V2 and V3 to achieve the desired overvoltage threshold. outputs that pull low when the respective V1, V2 and V3 are The comparator hysteresis can be set to an internally fixed within the OV/UV window for at least 256ms and release 30mV or set externally via the HYS pin. Connect unused when the respective V1, V2 and V3 are outside the OV/ pins to ground. UV window. Connect a resistor between VALID1, VALID2
SHDN:
Shutdown Input. Driving SHDN below 0.8V turns and VALID3 and a desired supply, up to a maximum of off all external back-to-back P-channel MOSFET devices, 36V, to provide the pull-up. Leave open when not used. forces the LTC4417 into a low current state, and resets
VS1, VS2, VS3:
External P-Channel MOSFET Common the 256ms timers used to validate V1, V2 and V3. Driving Source Connection. VS1, VS2 and VS3 supply the higher SHDN above 0.8V allows channels to validate and connect. voltage of V1, V2 and V3 or VOUT to the gate drivers. SHDN is pulled high to the internal VLDO voltage with a Connect VS1, VS2 and VS3 to the respective common 2µA current source and can be pulled up externally to a source connection of the back-to-back P-channel MOS- maximum voltage of 36V. Leave open when not used. FETs. Connect to ground when channel is not used. See
UV1, UV2, UV3:
Undervoltage Comparator Inputs. Falling Applications Information section for bypass capacitor voltages below 1V signal an undervoltage event, invalidat- recommendations. ing the respective input supply channel. Connect UV1, UV2
VOUT:
Output Voltage Supply and Sense. VOUT is an output and UV3 through a resistive divider between the respec- voltage sense pin used to prevent any input supply from tive V1, V2 and V3 and ground to achieve the desired connecting to the output if the output voltage is not at undervoltage threshold. The comparator hysteresis can least 120mV below the input supply voltage. During nor- be set to an internally fixed 30mV or set externally via the mal operation, VOUT powers most of the internal circuitry HYS pin. Connect pins from unused channels to ground. when its voltage exceeds 2.4V. Connect VOUT to the output. See Applications Information section for bypass capacitor recommendations. 4417f 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts
pin FuncTions G1, G2, G3:
P-Channel MOSFET Gate Drive Outputs. G1,
V1:
Highest Priority Input Supply. When V1 is within its user G2 and G3 are used to control external back-to-back P- defined OV/UV window for 256ms, it is connected to VOUT channel MOSFETs. When driven low, G1, G2 and G3 are via its external back-to-back P-channel MOSFETs. Connect clamped 6V below their corresponding VS1, VS2 and VS3. V1 to ground when channel is not used. See Applications Connect G1, G2 and G3 to external P-channel MOSFET Information for bypass capacitor recommendations. gate pins. See Dual Channel Applications Section for con-
V2:
Second Priority Input Supply. When V2 is within its necting unused channels. OV/UV window for 256ms, it is connected to VOUT via
GND:
Device Ground. its external back-to-back P-channel MOSFETs only if V1
HYS:
OV/UV Comparator Hysteresis Input. Connecting HYS does not meet its OV/UV requirements. Connect to ground to ground sets a fixed 30mV hysteresis for the OV and UV when channel is not used. See Applications Information comparators. Connecting a resistor, R for bypass capacitor recommendations. HYS, between HYS and ground disables the internal 30mV hysteresis and sets
V3:
Third Priority Input Supply. When V3 is within its OV/UV a 63mV/RHYS hysteresis current which is sourced from window for 256ms, it is connected to VOUT via its external each OV1, OV2 and OV3 and sunk into each UV1, UV2 and back-to-back P-channel MOSFETs only if V1 and V2 do UV3 pin. Connect to ground when not used. not meet their OV/UV requirements. Connect to ground
OV1, OV2, OV3:
Overvoltage Comparator Inputs. Rising when channel is not used. See Applications Information voltages above 1V signal an over voltage event, invalidating for bypass capacitor recommendations. the respective input supply channel. Connect OV1, OV2 and
VALID1, VALID2, VALID3:
Valid Channel Indicator Outputs. OV3 to an external resistive divider from its respective V1, VALID1, VALID2 and VALID3 are high voltage open drain V2 and V3 to achieve the desired overvoltage threshold. outputs that pull low when the respective V1, V2 and V3 are The comparator hysteresis can be set to an internally fixed within the OV/UV window for at least 256ms and release 30mV or set externally via the HYS pin. Connect unused when the respective V1, V2 and V3 are outside the OV/ pins to ground. UV window. Connect a resistor between VALID1, VALID2
SHDN:
Shutdown Input. Driving SHDN below 0.8V turns and VALID3 and a desired supply, up to a maximum of off all external back-to-back P-channel MOSFET devices, 36V, to provide the pull-up. Leave open when not used. forces the LTC4417 into a low current state, and resets
VS1, VS2, VS3:
External P-Channel MOSFET Common the 256ms timers used to validate V1, V2 and V3. Driving Source Connection. VS1, VS2 and VS3 supply the higher SHDN above 0.8V allows channels to validate and connect. voltage of V1, V2 and V3 or VOUT to the gate drivers. SHDN is pulled high to the internal VLDO voltage with a Connect VS1, VS2 and VS3 to the respective common 2µA current source and can be pulled up externally to a source connection of the back-to-back P-channel MOS- maximum voltage of 36V. Leave open when not used. FETs. Connect to ground when channel is not used. See
UV1, UV2, UV3:
Undervoltage Comparator Inputs. Falling Applications Information section for bypass capacitor voltages below 1V signal an undervoltage event, invalidat- recommendations. ing the respective input supply channel. Connect UV1, UV2
VOUT:
Output Voltage Supply and Sense. VOUT is an output and UV3 through a resistive divider between the respec- voltage sense pin used to prevent any input supply from tive V1, V2 and V3 and ground to achieve the desired connecting to the output if the output voltage is not at undervoltage threshold. The comparator hysteresis can least 120mV below the input supply voltage. During nor- be set to an internally fixed 30mV or set externally via the mal operation, VOUT powers most of the internal circuitry HYS pin. Connect pins from unused channels to ground. when its voltage exceeds 2.4V. Connect VOUT to the output. See Applications Information section for bypass capacitor recommendations. 4417f 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts
