Datasheet TC74HC279AP, TC74HC279AF (Toshiba) - 2

ManufacturerToshiba
DescriptionHigh speed CMOS Quad S-R Latch
Pages / Page8 / 2 — IEC Logic Symbol. Truth Table. System Diagram
File Format / SizePDF / 277 Kb
Document LanguageEnglish

IEC Logic Symbol. Truth Table. System Diagram

IEC Logic Symbol Truth Table System Diagram

Model Line for this Datasheet

Text Version of Document

TC74HC279AP/AF
IEC Logic Symbol
(2) & 1S1 S1 (3) (4) 1S2 1 1Q (1) R 1R (6) 2S S2 (7) (5) 2 2Q 2R (11) R 3S1 & (12) S3 3S2 (9) (10) 3 3Q 3R R (15) 4S S4 (13) (14) 4 4Q 4R R
Truth Table
Inputs Output S # R Q H H Qn L H H H L L L L H Qn: The level of Q before the indicated input condition were established. #: For latches with doubles S input. H = Both S input high L = One of both inputs low
System Diagram
2 2014-03-01 Document Outline TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic Features Pin Assignment IEC Logic Symbol Truth Table System Diagram Absolute Maximum Ratings (Note 1) Operating Ranges (Note) Electrical Characteristics DC Characteristics AC Characteristics (CL ( 15 pF, VCC ( 5 V, Ta ( 25°C, input: tr ( tf ( 6 ns) AC Characteristics (CL ( 50 pF, input: tr ( tf ( 6 ns) Package Dimensions Package Dimensions RESTRICTIONS ON PRODUCT USE