Datasheet MCP6V31, MCP6V31U, MCP6V32, MCP6V34 (Microchip) - 10

MCP6V31/1U/2/4 Note:
Unless otherwise indicated, TA = +25°C, VDD = +1.8V to 5.5V, VSS = GND, VCM = VDD/3, VOUT = VDD/2, VL = VDD/2, RL = 100 kΩ to VL and CL = 20 pF.
2.2 Other DC Voltages and Currents 0.4 40 1 Wafer Lot e -40°C g 0 3 . 30 +25°C lta +85°C 0.2 Upper ( V – V ) 20 Vo CMH DD +125°C 0.1 10 Mode m (V) o 0 0 . 0 mon eadro -0.1 -10 m rt Circuit Current (mA) H o Lower (V – V ) CML SS +125°C -0.2 -20 +85°C ut Co p +25°C -0.3 In -30 -40°C Output Sh -0.4 -40 -50 -25 0 25 50 75 100 125 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Ambient Temperature (°C) Power Supply Voltage (V) FIGURE 2-18:
Input Common Mode
FIGURE 2-21:
Output Short Circuit Current Voltage Headroom (Range) vs. Ambient vs. Power Supply Voltage. Temperature.
1000 35 Representative Part V) m 30 om ( o V – V 25 DD OH o V 100 eadr V – V 20 OL SS V = 5.5V H DD H V = 1.8V DD 15 ltage urrent (µA/amplifier) o 10 C 10 +125°C +85°C tput V 5 +25°C Supply -40°C Ou 1 0 0.1 1 10 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Output Current Magnitude (mA) Power Supply Voltage (V) FIGURE 2-19:
Output Voltage Headroom
FIGURE 2-22:
Supply Current vs. Power vs. Output Current. Supply Voltage.
12 40% R = 25 kȍ 850 Samples 11 L s 35% e 1 Wafer Lot 35% e 1 Wafer 10 T = +25°C A 9 30% (mV) rrenc 8 25% 7 V = 5.5V f Occu 6 DD 20% V – V 5 DD OH V – V 15% t Headroom OL SS u 4 tage o 10% 3 Outp 2 ercen 5% P V = 1.8V 1 DD 0% 0 0 2 4 6 8 0 2 4 6 8 0 -50 -25 0 25 50 75 100 125 1.1 1.1 1.1 1.1 1.1 1.2 1.2 1.2 1.2 1.2 1.3 Ambient Temperature (°C) POR Trip Voltage (V) FIGURE 2-20:
Output Voltage Headroom
FIGURE 2-23:
Power-on Reset Trip vs. Ambient Temperature. Voltage. DS20005127B-page 10  2012-2014 Microchip Technology Inc. Document Outline 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Specifications TABLE 1-1: DC Electrical Specifications TABLE 1-2: AC Electrical Specifications TABLE 1-3: Temperature Specifications 1.3 Timing Diagrams FIGURE 1-1: Amplifier Start Up. FIGURE 1-2: Offset Correction Settling Time. FIGURE 1-3: Output Overdrive Recovery. 1.4 Test Circuits FIGURE 1-4: AC and DC Test Circuit for Most Non-Inverting Gain Conditions. FIGURE 1-5: AC and DC Test Circuit for Most Inverting Gain Conditions. FIGURE 1-6: Test Circuit for Dynamic Input Behavior. 2.0 Typical Performance Curves 2.1 DC Input Precision FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage Quadratic Temp. Co. FIGURE 2-4: Input Offset Voltage vs. Power Supply Voltage with VCM = VCML. FIGURE 2-5: Input Offset Voltage vs. Power Supply Voltage with VCM = VCMH. FIGURE 2-6: Input Offset Voltage vs. Output Voltage. FIGURE 2-7: Input Offset Voltage vs. Common Mode Voltage with VDD = 1.8V. FIGURE 2-8: Input Offset Voltage vs. Common Mode Voltage with VDD = 5.5V. FIGURE 2-9: CMRR. FIGURE 2-10: PSRR. FIGURE 2-11: DC Open-Loop Gain. FIGURE 2-12: CMRR and PSRR vs. Ambient Temperature. FIGURE 2-13: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-14: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +85°C. FIGURE 2-15: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +125°C. FIGURE 2-16: Input Bias and Offset Currents vs. Ambient Temperature with VDD = +5.5V. FIGURE 2-17: Input Bias Current vs. Input Voltage (below VSS). 2.2 Other DC Voltages and Currents FIGURE 2-18: Input Common Mode Voltage Headroom (Range) vs. Ambient Temperature. FIGURE 2-19: Output Voltage Headroom vs. Output Current. FIGURE 2-20: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-22: Supply Current vs. Power Supply Voltage. FIGURE 2-23: Power-on Reset Trip Voltage. FIGURE 2-24: Power-on Reset Voltage vs. Ambient Temperature. 2.3 Frequency Response FIGURE 2-25: CMRR and PSRR vs. Frequency. FIGURE 2-26: Open-Loop Gain vs. Frequency with VDD = 1.8V. FIGURE 2-27: Open-Loop Gain vs. Frequency with VDD = 5.5V. FIGURE 2-28: Gain Bandwidth Product and Phase Margin vs. Ambient Temperature. FIGURE 2-29: Gain Bandwidth Product and Phase Margin vs. Common Mode Input Voltage. FIGURE 2-30: Gain Bandwidth Product and Phase Margin vs. Output Voltage. FIGURE 2-31: Closed-Loop Output Impedance vs. Frequency with VDD = 1.8V. FIGURE 2-32: Closed-Loop Output Impedance vs. Frequency with VDD = 5.5V. FIGURE 2-33: Channel-to-Channel Separation vs. Frequency. FIGURE 2-34: Maximum Output Voltage Swing vs. Frequency. 2.4 Input Noise and Distortion FIGURE 2-35: Input Noise Voltage Density and Integrated Input Noise Voltage vs. Frequency. FIGURE 2-36: Input Noise Voltage Density vs. Input Common Mode Voltage. FIGURE 2-37: Inter-Modulation Distortion vs. Frequency with VCM Disturbance (see Figure 1-6). FIGURE 2-38: Inter-Modulation Distortion vs. Frequency with VDD Disturbance (see Figure 1-6). FIGURE 2-39: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD = 1.8V. FIGURE 2-40: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD = 5.5V. 2.5 Time Response FIGURE 2-41: Input Offset Voltage vs. Time with Temperature Change. FIGURE 2-42: Input Offset Voltage vs. Time at Power Up. FIGURE 2-43: The MCP6V31/1U/2/4 Family Shows No Input Phase Reversal with Overdrive. FIGURE 2-44: Non-inverting Small Signal Step Response. FIGURE 2-45: Non-inverting Large Signal Step Response. FIGURE 2-46: Inverting Small Signal Step Response. FIGURE 2-47: Inverting Large Signal Step Response. FIGURE 2-48: Slew Rate vs. Ambient Temperature. FIGURE 2-49: Output Overdrive Recovery vs. Time with G = -10 V/V. FIGURE 2-50: Output Overdrive Recovery Time vs. Inverting Gain. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Applications 4.1 Overview of Zero-Drift Operation FIGURE 4-1: Simplified Zero-Drift Op Amp Functional Diagram. FIGURE 4-2: First Chopping Clock Phase; Equivalent Amplifier Diagram. FIGURE 4-3: Second Chopping Clock Phase; Equivalent Amplifier Diagram. 4.2 Other Functional Blocks FIGURE 4-4: Simplified Analog Input ESD Structures. FIGURE 4-5: Protecting the Analog Inputs Against High Voltages. FIGURE 4-6: Protecting the Analog Inputs Against High Currents. 4.3 Application Tips FIGURE 4-7: Output Resistor, RISO, Stabilizes Capacitive Loads. FIGURE 4-8: Recommended RISO values for Capacitive Loads. FIGURE 4-9: Output Load. FIGURE 4-10: Amplifier with Parasitic Capacitance. 4.4 Typical Applications FIGURE 4-11: Simple Design. FIGURE 4-12: RTD Sensor. FIGURE 4-13: Offset Correction. FIGURE 4-14: Precision Comparator. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Microchip Advanced Part Selector (MAPS) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product ID System Trademarks Worldwide Sales and Service