Datasheet LTC4315 (Analog Devices) - 7

ManufacturerAnalog Devices
Description2-Wire Bus Buffer with High Noise Margin
Pages / Page20 / 7 — BLOCK DIAGRAM
File Format / SizePDF / 282 Kb
Document LanguageEnglish

BLOCK DIAGRAM

BLOCK DIAGRAM

Model Line for this Datasheet

Text Version of Document

LTC4315
BLOCK DIAGRAM
V 200k 200k CC VCC2 PRECHARGE 200k 200k IRTA IRTA PRECHARGE PRECHARGE CONNECT CONNECT SCLIN SCLOUT VCC VCC2 SLEW RATE SLEW RATE DETECTOR DETECTOR IRTA 0.2V/μs 0.2V/μs IRTA CONNECT SDAIN SDAOUT SLEW RATE SLEW RATE DETECTOR DETECTOR 0.2V/μs 0.2V/μs RTA_SCLOUT_EN RTA_SCLIN_EN RTA_SDAIN_EN I2C Hot SwapTM I2C Hot Swap LOGIC LOGIC LOGIC + + VILt7MIN – – VILt7MIN 45ms TIMER + + VILt7MIN – – VILt7MIN DISCEN RTA_SDAOUT_EN ACC READY VCC2 95μs UVLO CONNECT TIMER VCC + PRECHARGE 2.7V/2.5V – CONNECT FAULT ENABLE + 1.4V/1.3V – GND 4315 BD 4315f 7 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM OPERATION APPLICATIONS INFORMATION PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS