Datasheet LTC5536 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | 600MHz to 7GHz Precision RF Detector with Fast Comparator Output |
| Pages / Page | 12 / 9 — APPLICATIO S I FOR ATIO. Higher Frequency Operation. High Speed Design … |
| File Format / Size | PDF / 169 Kb |
| Document Language | English |
APPLICATIO S I FOR ATIO. Higher Frequency Operation. High Speed Design Techniques
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LTC5536
U U W U APPLICATIO S I FOR ATIO Higher Frequency Operation
as a 100pF ceramic, is recommended, in parallel with a larger capacitor (e.g., 0.1 Operation of the LTC5536 at higher frequencies, to 12GHz µF). or above, is possible with reduced performance. Figure 4 Avoid ground bounce problems by proper attention to plots the VM switching voltage vs RFIN input power with a grounding, including the use of a low impedance ground 12GHz RF input. Consult factory for more information. plane. If necessary, edge transition time at the comparator output, VOUT, may be increased by means of an output
High Speed Design Techniques
R-C low pass filter. As with all high speed comparators, careful attention to Poor trace routes and high source impedances are also printed circuit board layout and design is important in common sources of problems. Keep all trace lengths as order to ensure signal integrity. The most common prob- short as possible and avoid running the output trace close lem involves insufficient power supply bypassing. Bypass to the VM or the LEN traces on the PC board. Also, keep the capacitors should be placed as close as possible to the VM source impedance low and decouple the VM pin with an LTC5536 VCC pin. A good high frequency capacitor, such appropriate capacitor if necessary. 80 350 150mV VCC = 3.6V FALLING T EDGE OUTPUT FALLING EDGE DELAY (ns) 70 A = 25°C 300 OUTPUT LOAD TO GROUND: SHUNT R = 1k 60 Ω, C = 10pF 250 VM = 200mV 50 200 115mV 40 115mV 150mV 150 30 VM = 200mV 100 20 OUTPUT RISING EDGE DELAY (ns) RISING 10 50 EDGE 0 0 –18 –14 –10 –6 –2 2 6 10 RF INPUT POWER (dBm) 5536 F02
Figure 2. Propagation Delay vs RF Input Power
RF RF INPUT = 2dBm IN INPUT 1000MHz, SIGNAL ASK MODULATED 2V/DIV VOUT VM = 200mV OUTPUT VCC = 3.6V SIGNAL OUTPUT LOAD (TO GROUND): SHUNT R = 1k SHUNT C = 10pF 5536 F03 100ns/DIV
Figure 3. Propagation Delay Example
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U U W U APPLICATIO S I FOR ATIO Higher Frequency Operation
as a 100pF ceramic, is recommended, in parallel with a larger capacitor (e.g., 0.1 Operation of the LTC5536 at higher frequencies, to 12GHz µF). or above, is possible with reduced performance. Figure 4 Avoid ground bounce problems by proper attention to plots the VM switching voltage vs RFIN input power with a grounding, including the use of a low impedance ground 12GHz RF input. Consult factory for more information. plane. If necessary, edge transition time at the comparator output, VOUT, may be increased by means of an output
High Speed Design Techniques
R-C low pass filter. As with all high speed comparators, careful attention to Poor trace routes and high source impedances are also printed circuit board layout and design is important in common sources of problems. Keep all trace lengths as order to ensure signal integrity. The most common prob- short as possible and avoid running the output trace close lem involves insufficient power supply bypassing. Bypass to the VM or the LEN traces on the PC board. Also, keep the capacitors should be placed as close as possible to the VM source impedance low and decouple the VM pin with an LTC5536 VCC pin. A good high frequency capacitor, such appropriate capacitor if necessary. 80 350 150mV VCC = 3.6V FALLING T EDGE OUTPUT FALLING EDGE DELAY (ns) 70 A = 25°C 300 OUTPUT LOAD TO GROUND: SHUNT R = 1k 60 Ω, C = 10pF 250 VM = 200mV 50 200 115mV 40 115mV 150mV 150 30 VM = 200mV 100 20 OUTPUT RISING EDGE DELAY (ns) RISING 10 50 EDGE 0 0 –18 –14 –10 –6 –2 2 6 10 RF INPUT POWER (dBm) 5536 F02
Figure 2. Propagation Delay vs RF Input Power
RF RF INPUT = 2dBm IN INPUT 1000MHz, SIGNAL ASK MODULATED 2V/DIV VOUT VM = 200mV OUTPUT VCC = 3.6V SIGNAL OUTPUT LOAD (TO GROUND): SHUNT R = 1k SHUNT C = 10pF 5536 F03 100ns/DIV
Figure 3. Propagation Delay Example
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