Datasheet AD8450 (Analog Devices) - 3

ManufacturerAnalog Devices
DescriptionPrecision Analog Front End and Controller for Battery Test/Formation Systems
Pages / Page42 / 3 — AD8450. Data Sheet. TABLE OF CONTENTS. 7/14—Rev. 0 to Rev. A. REVISION …
RevisionB
File Format / SizePDF / 1.4 Mb
Document LanguageEnglish

AD8450. Data Sheet. TABLE OF CONTENTS. 7/14—Rev. 0 to Rev. A. REVISION HISTORY. 8/15—Rev. A to Rev. B

AD8450 Data Sheet TABLE OF CONTENTS 7/14—Rev 0 to Rev A REVISION HISTORY 8/15—Rev A to Rev B

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AD8450 Data Sheet TABLE OF CONTENTS
Features .. 1 Overcurrent and Overvoltage Comparators ... 27 Applications ... 1 Current Sharing Bus and IMAX Output ... 28 General Description ... 1 Applications Information .. 29 Functional Block Diagram .. 1 Functional Description .. 29 Revision History ... 2 Power Supply Connections ... 29 Specifications ... 3 Power Supply Sequencing ... 29 Absolute Maximum Ratings .. 8 Power-On Sequence ... 29 Thermal Resistance .. 8 Power-Off Sequence ... 30 ESD Caution .. 8 PGIA Connections ... 30 Pin Configuration and Function Descriptions ... 9 PGDA Connections ... 31 Typical Performance Characteristics ... 11 Battery Current and Voltage Control Inputs (ISET and VSET) PGIA Characteristics ... 11 ... 31 PGDA Characteristics .. 13 Loop Filter Amplifiers ... 32 CC and CV Loop Filter Amplifiers, Uncommitted Op Amp, Connecting to a PWM Controller (VCTRL Pin) .. 32 and VSET Buffer ... 15 Overvoltage and Overcurrent Comparators ... 32 VINT Buffer .. 17 Step by Step Design Example .. 32 Current Sharing Amplifier .. 18 Additional Information ... 33 Comparators .. 19 Evaluation Board .. 34 Reference Characteristics .. 20 Introduction .. 34 Theory of Operation .. 21 Features and Tests ... 34 Introduction .. 21 Testing the AD8450-EVALZ ... 34 Programmable Gain Instrumentation Amplifier (PGIA) ... 23 Using the AD8450 .. 36 Programmable Gain Difference Amplifier (PGDA) .. 24 Schematic and Artwork ... 37 CC and CV Loop Filter Amplifiers .. 24 Outline Dimensions ... 41 Compensation ... 26 Ordering Guide .. 41 VINT Buffer .. 26 MODE Pin, Charge and Discharge Control ... 26
7/14—Rev. 0 to Rev. A REVISION HISTORY
Changes to General Description ... 1
8/15—Rev. A to Rev. B
Changes to Pin 39 and Pin 80 Descriptions .. 10 Changes to Table 2 .. 8 Changes to Introduction Section and Figure 50 .. 22 Added Power Supply Sequencing Section and Power-On Changes to Figure 52 .. 24 Sequence Section .. 29 Changes to Figure 55 .. 26 Added Power-Off Sequence .. 30 Changes to Current Sharing Bus and IMAX Output Section .. 27 Added Additional Information Section ... 33 Changes to Figure 58 .. 28 Changes to Step 4: Determine the Control Voltage for the CC Changes to Figure 59 .. 30 Loop, the Shunt Resistor, and the PGIA Gain Section .. 33 Changes to Evaluation Board Section.. 33
1/14—Revision 0: Initial Version
Rev. B | Page 2 of 41 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS PGIA CHARACTERISTICS PGDA CHARACTERISTICS CC AND CV LOOP FILTER AMPLIFIERS, UNCOMMITTED OP AMP, AND VSET BUFFER VINT BUFFER CURRENT SHARING AMPLIFIER COMPARATORS REFERENCE CHARACTERISTICS THEORY OF OPERATION INTRODUCTION PROGRAMMABLE GAIN INSTRUMENTATION AMPLIFIER (PGIA) Gain Selection Reversing Polarity When Charging and Discharging PGIA Offset Option Battery Reversal and Overvoltage Protection PROGRAMMABLE GAIN DIFFERENCE AMPLIFIER (PGDA) CC AND CV LOOP FILTER AMPLIFIERS COMPENSATION VINT BUFFER MODE PIN, CHARGE AND DISCHARGE CONTROL OVERCURRENT AND OVERVOLTAGE COMPARATORS CURRENT SHARING BUS AND IMAX OUTPUT APPLICATIONS INFORMATION FUNCTIONAL DESCRIPTION POWER SUPPLY CONNECTIONS POWER SUPPLY SEQUENCING POWER-ON SEQUENCE POWER-OFF SEQUENCE PGIA CONNECTIONS Current Sensors Optional Low-Pass Filter PGDA CONNECTIONS Reverse Battery Conditions BATTERY CURRENT AND VOLTAGE CONTROL INPUTS (ISET AND VSET) LOOP FILTER AMPLIFIERS CONNECTING TO A PWM CONTROLLER (VCTRL PIN) OVERVOLTAGE AND OVERCURRENT COMPARATORS STEP BY STEP DESIGN EXAMPLE Step 1: Design the Switching Power Converter Step 2: Identify the Control Voltage Range of the ADP1972 Step 3: Determine the Control Voltage for the CV Loop and the PGDA Gain Step 4: Determine the Control Voltage for the CC Loop, the Shunt Resistor, and the PGIA Gain Step 5: Choose the Control Voltage Sources Step 6: Select the Compensation Devices ADDITIONAL INFORMATION EVALUATION BOARD INTRODUCTION FEATURES AND TESTS TESTING THE AD8450-EVALZ PGIA and Offset PGIA Gain Test PGIA in an Application Simple Offset Test Offset in an Application PGDA and Offset Simple Test PGDA in an Application PGDA Offset Overload Comparators VSET Buffer CV and CC Loop Filter Amplifiers CC and CV Integrator Tests Uncommitted Op Amp USING THE AD8450 SCHEMATIC AND ARTWORK OUTLINE DIMENSIONS ORDERING GUIDE