Datasheet AD712-EP (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | Dual Precision, Low Cost, High Speed BiFET Op Amp |
| Pages / Page | 12 / 8 — 100. –70. VS = ±15V VCM = 1V p-p. –80. 25°C. 3V rms RL = 2kΩ. –90. CL = … |
| File Format / Size | PDF / 206 Kb |
| Document Language | English |
100. –70. VS = ±15V VCM = 1V p-p. –80. 25°C. 3V rms RL = 2kΩ. –90. CL = 100pF. ) 60. R (. –100. HD (. –110. –120. –130. 10k. 100k. FREQUENCY (Hz)
Model Line for this Datasheet
Text Version of Document
AD712-EP
100 –70 VS = ±15V VCM = 1V p-p –80 80 25°C 3V rms RL = 2kΩ –90 CL = 100pF ) 60 B B) d d R ( –100 HD ( CM T 40 –110 20 –120 0
4
–130
7
10 100 1k 10k 100k 1M
01
100 1k 10k 100k
01 5- 5- 28
FREQUENCY (Hz)
28
FREQUENCY (Hz)
09 09 Figure 14. Common-Mode Rejection (CMR) vs. Frequency Figure 17. Total Harmonic Distortion (THD) vs. Frequency
30 1k RL = 2kΩ 25°C p) 25 VS = ±15V ) p- V √Hz ( V/ G 20 (n 100 IN E W G S A E T L G 15 O TA L O ISE V O T V 10 10 U N T TP U PU O 5 IN 0 1
15 18
100k 1M 10M
0
1 10 100 1k 10k 100k
0 5- 5-
FREQUENCY (Hz)
28
FREQUENCY (Hz)
28 09 09 Figure 15. Large Signal Frequency Response Figure 18. Input Noise Voltage Spectral Density
10 25 8 S T L 6 O 20 V ± 4 ) TO s V µ 2 V/ 15 1% 0.1% 0.01% OM 0 E ( 0 T A ERROR 1% 0.1% 0.01% G FR R –2 IN 10 EW W S SL –4 T U TP –6 5 OU –8 –10
16
0 0.5 0.6 0.7 0.8 0.9 1.0
0 5-
0 100 200 300 400 500 600 700 800 900
9 01
SETTLING TIME (µs)
28
INPUT ERROR SIGNAL (mV)
09 5-
(AT SUMMING JUNCTION)
28 09 Figure 16. Output Swing and Error vs. Settling Time Figure 19. Slew Rate vs. Input Error Signal Rev. 0 | Page 8 of 12 Document Outline FEATURES GENERAL DESCRIPTION CONNECTION DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE
100 –70 VS = ±15V VCM = 1V p-p –80 80 25°C 3V rms RL = 2kΩ –90 CL = 100pF ) 60 B B) d d R ( –100 HD ( CM T 40 –110 20 –120 0
4
–130
7
10 100 1k 10k 100k 1M
01
100 1k 10k 100k
01 5- 5- 28
FREQUENCY (Hz)
28
FREQUENCY (Hz)
09 09 Figure 14. Common-Mode Rejection (CMR) vs. Frequency Figure 17. Total Harmonic Distortion (THD) vs. Frequency
30 1k RL = 2kΩ 25°C p) 25 VS = ±15V ) p- V √Hz ( V/ G 20 (n 100 IN E W G S A E T L G 15 O TA L O ISE V O T V 10 10 U N T TP U PU O 5 IN 0 1
15 18
100k 1M 10M
0
1 10 100 1k 10k 100k
0 5- 5-
FREQUENCY (Hz)
28
FREQUENCY (Hz)
28 09 09 Figure 15. Large Signal Frequency Response Figure 18. Input Noise Voltage Spectral Density
10 25 8 S T L 6 O 20 V ± 4 ) TO s V µ 2 V/ 15 1% 0.1% 0.01% OM 0 E ( 0 T A ERROR 1% 0.1% 0.01% G FR R –2 IN 10 EW W S SL –4 T U TP –6 5 OU –8 –10
16
0 0.5 0.6 0.7 0.8 0.9 1.0
0 5-
0 100 200 300 400 500 600 700 800 900
9 01
SETTLING TIME (µs)
28
INPUT ERROR SIGNAL (mV)
09 5-
(AT SUMMING JUNCTION)
28 09 Figure 16. Output Swing and Error vs. Settling Time Figure 19. Slew Rate vs. Input Error Signal Rev. 0 | Page 8 of 12 Document Outline FEATURES GENERAL DESCRIPTION CONNECTION DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE
