Datasheet 2N5020, 2N5021 (InterFET)
| Manufacturer | InterFET |
| Description | P-Channel Silicon Junction Field-Effect Transistor |
| Pages / Page | 1 / 1 — B-18. 01/99. 2N5020, 2N5021. P-Channel Silicon Junction Field-Effect … |
| File Format / Size | PDF / 92 Kb |
| Document Language | English |
B-18. 01/99. 2N5020, 2N5021. P-Channel Silicon Junction Field-Effect Transistor. ¥ Analog Switches
Model Line for this Datasheet
Text Version of Document
Databook.fxp 1/13/99 2:09 PM Page B-18
B-18 01/99 2N5020, 2N5021 P-Channel Silicon Junction Field-Effect Transistor ¥ Analog Switches Absolute maximum ratings at TA = 25¡C
Reverse Gate Source & Reverse Gate Drain Voltage – 50 V Continuous Forward Gate Current 50 mA Continuous Device Power Dissipation 500 mW Power Derating 4 mW/°C Storage Temperature Range – 65°C to + 200°C
At 25°C free air temperature: 2N5020 2N5021 Process PJ32 Static Electrical Characteristics Min Max Min Max Unit Test Conditions
Gate Source Breakdown Voltage V(BR)GDO 25 25 V IG = 1µA, VDS = ØV Gate Reverse Current IGSS 1 1 nA VGS = 15V, VDS = ØV Gate Source Cutoff Voltage VGS(OFF) 0.3 1.5 0.5 2.5 V VDS = – 15V, ID = 1 nA Drain Saturation Current (Pulsed) IDSS – 0.3 – 1.2 – 1 – 3.5 mA VDS = – 15V, VGS = ØV
Dynamic Electrical Characteristics
Common Source gfs 1 3.5 1.5 6 mS VDS = – 15V, VGS = ØV Forward Transconductance Common Source Output Conductance gos 20 20 µS VDS = – 15V, VGS = ØV Common Source Input Capacitance Ciss 25 25 pF VDS = – 15V, VGS = ØV f = 1 MHz Common Source Crss 7 7 pF VDS = – 15V, VGS = ØV f = 1 MHz Reverse Transfer Capacitance
TOÐ18 Package Surface Mount
Dimensions in Inches (mm) SMP5020, SMP5021
Pin Configuration
1 Source 1, 2 Gate & Case, 3 Drain 1000 N. Shiloh Road, Garland, TX 75042 (972) 487-1287 FAX (972) 276-3375
www.interfet.com
B-18 01/99 2N5020, 2N5021 P-Channel Silicon Junction Field-Effect Transistor ¥ Analog Switches Absolute maximum ratings at TA = 25¡C
Reverse Gate Source & Reverse Gate Drain Voltage – 50 V Continuous Forward Gate Current 50 mA Continuous Device Power Dissipation 500 mW Power Derating 4 mW/°C Storage Temperature Range – 65°C to + 200°C
At 25°C free air temperature: 2N5020 2N5021 Process PJ32 Static Electrical Characteristics Min Max Min Max Unit Test Conditions
Gate Source Breakdown Voltage V(BR)GDO 25 25 V IG = 1µA, VDS = ØV Gate Reverse Current IGSS 1 1 nA VGS = 15V, VDS = ØV Gate Source Cutoff Voltage VGS(OFF) 0.3 1.5 0.5 2.5 V VDS = – 15V, ID = 1 nA Drain Saturation Current (Pulsed) IDSS – 0.3 – 1.2 – 1 – 3.5 mA VDS = – 15V, VGS = ØV
Dynamic Electrical Characteristics
Common Source gfs 1 3.5 1.5 6 mS VDS = – 15V, VGS = ØV Forward Transconductance Common Source Output Conductance gos 20 20 µS VDS = – 15V, VGS = ØV Common Source Input Capacitance Ciss 25 25 pF VDS = – 15V, VGS = ØV f = 1 MHz Common Source Crss 7 7 pF VDS = – 15V, VGS = ØV f = 1 MHz Reverse Transfer Capacitance
TOÐ18 Package Surface Mount
Dimensions in Inches (mm) SMP5020, SMP5021
Pin Configuration
1 Source 1, 2 Gate & Case, 3 Drain 1000 N. Shiloh Road, Garland, TX 75042 (972) 487-1287 FAX (972) 276-3375
www.interfet.com
