Datasheet 2N5457, 2N5458 (ON Semiconductor)
Manufacturer | ON Semiconductor |
Description | JFETs - General Purpose |
Pages / Page | 5 / 1 — N−Channel − Depletion. http://onsemi.com. Features. MARKING DIAGRAM. … |
Revision | 6 |
File Format / Size | PDF / 142 Kb |
Document Language | English |
N−Channel − Depletion. http://onsemi.com. Features. MARKING DIAGRAM. MAXIMUM RATINGS. Rating. Symbol. Value. Unit. TO−92. CASE 29. STYLE 5
Model Line for this Datasheet
Text Version of Document
2N5457, 2N5458 JFETs - General Purpose
N−Channel − Depletion
N−Channel Junction Field Effect Transistors, depletion mode (Type A) designed for audio and switching applications.
http://onsemi.com Features
• N−Channel for Higher Gain 1 DRAIN • Drain and Source Interchangeable • High AC Input Impedance 3 • High DC Input Resistance GATE • Low Transfer and Input Capacitance • Low Cross−Modulation and Intermodulation Distortion 2 SOURCE • Plastic Encapsulated Package • Pb−Free Packages are Available*
MARKING DIAGRAM MAXIMUM RATINGS
2N
Rating Symbol Value Unit
545x Drain−Source Voltage V AYWWG DS 25 Vdc G Drain−Gate Voltage V 1 DG 25 Vdc 1 2 2 3 3 Reverse Gate −Source Voltage VGSR −25 Vdc STRAIGHT LEAD BENT LEAD Gate Current IG 10 mAdc BULK PACK TAPE & REEL
TO−92
AMMO PACK Total Device Dissipation @ T
CASE 29
A = 25°C PD 310 mW Derate above 25°C 2.82 mW/°C
STYLE 5
Operating Junction Temperature T 2N545x = Device Code J 135 °C x = 7 or 8 Storage Temperature Range Tstg −65 to +150 °C A = Assembly Location Stresses exceeding Maximum Ratings may damage the device. Maximum Y = Year Ratings are stress ratings only. Functional operation above the Recommended WW = Work Week Operating Conditions is not implied. Extended exposure to stresses above the G = Pb−Free Package Recommended Operating Conditions may affect device reliability. (Note: Microdot may be in either location)
ORDERING INFORMATION Device Package Shipping
2N5457 TO−92 1000 Units/Box 2N5457G TO−92 1000 Units/Box (Pb−Free) 2N5458 TO−92 1000 Units/Box 2N5458G TO−92 1000 Units/Box (Pb−Free) *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2010
1
Publication Order Number:
February, 2010 − Rev. 6 2N5457/D