Datasheet AD5748 (Analog Devices) - 3

Data Sheet AD5748 FUNCTIONAL BLOCK DIAGRAM DVCC GND AVDD GND COMP1 COMP2 CLEAR AD5748 CLRSEL VSENSE+ SCLK/OUTEN * INPUT SHIFT SDIN/R0 * REGISTER VOUT RANGE AND VOUT SYNC/RSET * SCALING CONTROL SDO/VFAULT * LOGIC VOUT SHORT FAULT HW SELECT STATUS VSENSE– REGISTER AVDD VIN VREF R2 R3 REXT1 RESET REXT2 IOUT IOUT RANGE SCALING RSET OVERTEMP FAULT/TEMP * VOUT SHORT FAULT NC/IFAULT * IOUT OPEN FAULT POWER- IOUT ON RESET OPEN FAULT PEC ERROR AD2/R1 * AD1/R2 * AD0/R3 * AVSS * DENOTES SHARED PIN. SOFTWARE MODE DENOTED BY REGULAR TEXT, HARDWARE MODE
001
DENOTED BY ITALIC TEXT. FOR EXAMPLE, FOR FAULT/TEMP PIN, IN SOFTWARE MODE, THIS PIN TAKES ON FAULT FUNCTION. IN HARDWARE MODE, THIS PIN TAKES ON TEMP FUNCTION.
08922- Figure 1. Rev. B | Page 3 of 32 Document Outline Features Applications General Description Table of Contents Revision History Functional Block Diagram Specifications Timing Characteristics Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Voltage Output Current Output Terminology Theory of Operation Software Mode Current Output Architecture Driving Inductive Loads Voltage Output Amplifier Driving Large Capacitive Loads Power-On State of the AD5748 Default Registers at Power-On Reset Function OUTEN Software Control Input Shift Register Readback Operation Hardware Control Transfer Function Detailed Description of Features Output Fault Alert—Software Mode Output Fault Alert—Hardware Mode Voltage Output Short-Circuit Protection Asynchronous Clear (CLEAR) Current Setting Resistor Packet Error Checking Applications Information Transient Voltage Protection Thermal Considerations Layout Guidelines Galvanically Isolated Interface Microprocessor Interfacing Outline Dimensions Ordering Guide