Datasheet AD8340 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | 700 MHz TO 1000 MHz RF Vector Modulator |
| Pages / Page | 20 / 9 — Data Sheet. AD8340. 120. 150. 1.5GHz. 500MHz. –10. 180. Bm) –15. –20. … |
| Revision | C |
| File Format / Size | PDF / 429 Kb |
| Document Language | English |
Data Sheet. AD8340. 120. 150. 1.5GHz. 500MHz. –10. 180. Bm) –15. –20. OWE. 210. 330. –25. T P U –30. –35. F OU. 240. 300. –40. 270. –45. IMPEDANCE CIRCLE. –50
Model Line for this Datasheet
Text Version of Document
Data Sheet AD8340 90 120 60 0 150 30 1.5GHz 500MHz –5 –10 180 0 Bm) –15 (d 500MHz R 1.5GHz –20 OWE 210 330 –25 T P U –30 TP –35 F OU 240 300 R –40 270 –45
024
IMPEDANCE CIRCLE
04699-
–50 S22 PORT WITH 1 TO 1 TRANSFORMER
021
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 SDD22 PORT DIFFERENTIAL DSOP VOLTAGE (V)
04699- Figure 21. Output Impedance Smith Chart (with Frequency Markers) Figure 24. Power Shutdown Attenuation
TEK FAST ACQ SAMPLE 6 4 PHASE SETPOINT = 45° 2 2V/DIV PHASE SETPOINT = 0° 0 ) rees) V Deg –2 200mV/DIV DSOP R ( CHA3 ( –4 RRO 3 E –6 CHA1/ E HAS –8 P PHASE SETPOINT = 90° –10 RF OUTPUT
025
–12
022 04699- 04699-
–14 CH1 200mVΩ M 10.0ns 5.0GS/s ET 200ps/pt 74.0ns 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 CH3 2.0V A CH2 160mV GAIN SETPOINT TIME (10ns/DIV)
Figure 22. Phase Error vs. Gain Setpoint by Phase Setpoint, Figure 25. Power Shutdown Response Time 5 V DC, 25°C, 880 MHz
135 134 133 132 mA) ( 5.25V NT 131 130 CURRE Y L 129 5V PP 128 SU 127 4.75V 126
023 04699-
125 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 TEMPERATURE (°C)
Figure 23. Supply Current vs. Temperature Rev. C | Page 9 of 20 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation RF Quadrature Generator I-Q Attenuators and Baseband Amplifiers Output Amplifier Noise and Distortion Gain and Phase Accuracy RF Frequency Range Applications Information Using the AD8340 RF Input and Matching RF Output and Matching Driving the I-Q Baseband Controls Interfacing to High Speed DACs CDMA2000 Application Evaluation Board Schematic and Artwork Outline Dimensions Ordering Guide
024
IMPEDANCE CIRCLE
04699-
–50 S22 PORT WITH 1 TO 1 TRANSFORMER
021
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 SDD22 PORT DIFFERENTIAL DSOP VOLTAGE (V)
04699- Figure 21. Output Impedance Smith Chart (with Frequency Markers) Figure 24. Power Shutdown Attenuation
TEK FAST ACQ SAMPLE 6 4 PHASE SETPOINT = 45° 2 2V/DIV PHASE SETPOINT = 0° 0 ) rees) V Deg –2 200mV/DIV DSOP R ( CHA3 ( –4 RRO 3 E –6 CHA1/ E HAS –8 P PHASE SETPOINT = 90° –10 RF OUTPUT
025
–12
022 04699- 04699-
–14 CH1 200mVΩ M 10.0ns 5.0GS/s ET 200ps/pt 74.0ns 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 CH3 2.0V A CH2 160mV GAIN SETPOINT TIME (10ns/DIV)
Figure 22. Phase Error vs. Gain Setpoint by Phase Setpoint, Figure 25. Power Shutdown Response Time 5 V DC, 25°C, 880 MHz
135 134 133 132 mA) ( 5.25V NT 131 130 CURRE Y L 129 5V PP 128 SU 127 4.75V 126
023 04699-
125 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 TEMPERATURE (°C)
Figure 23. Supply Current vs. Temperature Rev. C | Page 9 of 20 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation RF Quadrature Generator I-Q Attenuators and Baseband Amplifiers Output Amplifier Noise and Distortion Gain and Phase Accuracy RF Frequency Range Applications Information Using the AD8340 RF Input and Matching RF Output and Matching Driving the I-Q Baseband Controls Interfacing to High Speed DACs CDMA2000 Application Evaluation Board Schematic and Artwork Outline Dimensions Ordering Guide
