Datasheet LT3957A (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Boost, Flyback, SEPIC and Inverting Converter with 5A, 40V Switch |
| Pages / Page | 28 / 9 — APPLICATIONS INFORMATION. Main Control Loop. Programming Turn-On and … |
| File Format / Size | PDF / 567 Kb |
| Document Language | English |
APPLICATIONS INFORMATION. Main Control Loop. Programming Turn-On and Turn-Off Thresholds with. the EN/UVLO Pin
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LT3957A
APPLICATIONS INFORMATION Main Control Loop
The LT3957A has overvoltage protection functions to protect the converter from excessive output voltage The LT3957A uses a fixed frequency, current mode con- overshoot during start-up or recovery from a short-circuit trol scheme to provide excellent line and load regulation. condition. An overvoltage comparator A11 (with 20mV Operation can be best understood by referring to the Block hysteresis) senses when the FBX pin voltage exceeds the Diagram in Figure 1. positive regulated voltage (1.6V) by 8% and provides a The start of each oscillator cycle sets the SR latch (SR1) reset pulse. Similarly, an overvoltage comparator A12 and turns on the internal power MOSFET switch M1 through (with 10mV hysteresis) senses when the FBX pin voltage driver G2. The switch current flows through the internal exceeds the negative regulated voltage (–0.8V) by 11% current sensing resistor RSENSE and generates a voltage and provides a reset pulse. Both reset pulses are sent to proportional to the switch current. This current sense the main RS latch (SR1) through G6 and G5. The power voltage VISENSE (amplified by A5) is added to a stabilizing MOSFET switch M1 is actively held off for the duration of slope compensation ramp and the resulting sum (SLOPE) an output overvoltage condition. is fed into the positive terminal of the PWM comparator A7. When SLOPE exceeds the level at the negative input of A7
Programming Turn-On and Turn-Off Thresholds with
(VC pin), SR1 is reset, turning off the power switch. The
the EN/UVLO Pin
level at the negative input of A7 is set by the error amplifier The EN/UVLO pin controls whether the LT3957A is enabled A1 (or A2) and is an amplified version of the difference or is in shutdown state. A micropower 1.22V reference, between the feedback voltage (FBX pin) and the reference a comparator A10 and a controllable current source I voltage (1.6V or –0.8V, depending on the configuration). S1 allow the user to accurately program the supply voltage In this manner, the error amplifier sets the correct peak at which the IC turns on and off. The falling value can be switch current level to keep the output in regulation. accurately set by the resistor dividers R3 and R4. When The LT3957A has a switch current limit function. The cur- EN/UVLO is above 0.4V, and below the 1.22V threshold, the rent sense voltage is input to the current limit comparator small pull-down current source IS1 (typical 2μA) is active. A6. If the SENSE2 pin voltage is higher than the sense The purpose of this current is to allow the user to program current limit threshold VSENSE(MAX) (48mV, typical), A6 the rising hysteresis. The Block Diagram of the comparator will reset SR1 and turn off M1 immediately. and the external resistors is shown in Figure 1. The typical The LT3957A is capable of generating either positive or falling threshold voltage and rising threshold voltage can negative output voltage with a single FBX pin. It can be be calculated by the following equations: configured as a boost, flyback or SEPIC converter to gen- (R3+R4) erate positive output voltage, or as an inverting converter VVIN,FALLING = 1.22 • to generate negative output voltage. When configured as R4 a SEPIC converter, as shown in Figure 1, the FBX pin is VVIN,RISING = 2μA • R3+ VIN,FALLING pulled up to the internal bias voltage of 1.6V by a volt- age divider (R1 and R2) connected from VOUT to SGND. For applications where the EN/UVLO pin is only used as Comparator A2 becomes inactive and comparator A1 a logic input, the EN/UVLO pin can be connected directly performs the inverting amplification from FBX to VC. to the input voltage VIN for always-on operation. When the LT3957A is in an inverting configuration, the FBX pin is pulled down to –0.8V by a voltage divider
INTVCC Regulator Bypassing and Operation
connected from VOUT to SGND. Comparator A1 becomes An internal, low dropout (LDO) voltage regulator produces inactive and comparator A2 performs the noninverting the 5.2V INTVCC supply which powers the gate driver, as amplification from FBX to VC. shown in Figure 1. The LT3957A contains an undervoltage lockout comparator A8 for the INTVCC supply. The INTVCC 3957afa 9
APPLICATIONS INFORMATION Main Control Loop
The LT3957A has overvoltage protection functions to protect the converter from excessive output voltage The LT3957A uses a fixed frequency, current mode con- overshoot during start-up or recovery from a short-circuit trol scheme to provide excellent line and load regulation. condition. An overvoltage comparator A11 (with 20mV Operation can be best understood by referring to the Block hysteresis) senses when the FBX pin voltage exceeds the Diagram in Figure 1. positive regulated voltage (1.6V) by 8% and provides a The start of each oscillator cycle sets the SR latch (SR1) reset pulse. Similarly, an overvoltage comparator A12 and turns on the internal power MOSFET switch M1 through (with 10mV hysteresis) senses when the FBX pin voltage driver G2. The switch current flows through the internal exceeds the negative regulated voltage (–0.8V) by 11% current sensing resistor RSENSE and generates a voltage and provides a reset pulse. Both reset pulses are sent to proportional to the switch current. This current sense the main RS latch (SR1) through G6 and G5. The power voltage VISENSE (amplified by A5) is added to a stabilizing MOSFET switch M1 is actively held off for the duration of slope compensation ramp and the resulting sum (SLOPE) an output overvoltage condition. is fed into the positive terminal of the PWM comparator A7. When SLOPE exceeds the level at the negative input of A7
Programming Turn-On and Turn-Off Thresholds with
(VC pin), SR1 is reset, turning off the power switch. The
the EN/UVLO Pin
level at the negative input of A7 is set by the error amplifier The EN/UVLO pin controls whether the LT3957A is enabled A1 (or A2) and is an amplified version of the difference or is in shutdown state. A micropower 1.22V reference, between the feedback voltage (FBX pin) and the reference a comparator A10 and a controllable current source I voltage (1.6V or –0.8V, depending on the configuration). S1 allow the user to accurately program the supply voltage In this manner, the error amplifier sets the correct peak at which the IC turns on and off. The falling value can be switch current level to keep the output in regulation. accurately set by the resistor dividers R3 and R4. When The LT3957A has a switch current limit function. The cur- EN/UVLO is above 0.4V, and below the 1.22V threshold, the rent sense voltage is input to the current limit comparator small pull-down current source IS1 (typical 2μA) is active. A6. If the SENSE2 pin voltage is higher than the sense The purpose of this current is to allow the user to program current limit threshold VSENSE(MAX) (48mV, typical), A6 the rising hysteresis. The Block Diagram of the comparator will reset SR1 and turn off M1 immediately. and the external resistors is shown in Figure 1. The typical The LT3957A is capable of generating either positive or falling threshold voltage and rising threshold voltage can negative output voltage with a single FBX pin. It can be be calculated by the following equations: configured as a boost, flyback or SEPIC converter to gen- (R3+R4) erate positive output voltage, or as an inverting converter VVIN,FALLING = 1.22 • to generate negative output voltage. When configured as R4 a SEPIC converter, as shown in Figure 1, the FBX pin is VVIN,RISING = 2μA • R3+ VIN,FALLING pulled up to the internal bias voltage of 1.6V by a volt- age divider (R1 and R2) connected from VOUT to SGND. For applications where the EN/UVLO pin is only used as Comparator A2 becomes inactive and comparator A1 a logic input, the EN/UVLO pin can be connected directly performs the inverting amplification from FBX to VC. to the input voltage VIN for always-on operation. When the LT3957A is in an inverting configuration, the FBX pin is pulled down to –0.8V by a voltage divider
INTVCC Regulator Bypassing and Operation
connected from VOUT to SGND. Comparator A1 becomes An internal, low dropout (LDO) voltage regulator produces inactive and comparator A2 performs the noninverting the 5.2V INTVCC supply which powers the gate driver, as amplification from FBX to VC. shown in Figure 1. The LT3957A contains an undervoltage lockout comparator A8 for the INTVCC supply. The INTVCC 3957afa 9
