Datasheet LTC3765 (Analog Devices) - 10

LTC3765
OPERATION
The delay time between the primary switch turn-off and the
Direct Flux Limit
active clamp turn-on is substantially less critical. Relative In active clamp forward converters, it is essential to es- to the power loss due to turning on the primary switch, the tablish an accurate limit to the transformer flux density power loss from switching the active clamp is significantly in order to avoid core saturation during load transients or less. This difference results from both the lower current when starting up into a pre-biased output. Although the that the active clamp switches and the natural resonance active clamp technique provides a suitable reset voltage of the system which facilitates zero voltage switching. during steady-state operation, the sudden increase in duty When the primary switch turns off, the main transformer cycle caused in response to a load step can cause the leakage inductance is biased with the peak ripple current transformer flux to accumulate or “walk,” potentially lead- of the inductor reflected through the transformer. This ing to saturation. This occurs because the reset voltage on current drives the voltage across the active clamp PMOS the active clamp capacitor cannot keep up with the rapidly quickly to 0V. Turning on the PMOS after this transition changing duty cycle. This effect is most pronounced at low results in minimal switching power loss. The LTC3765 input voltage, where the voltage loop demands a greater active clamp turn on delay is internally fixed to 180ns. increase in duty cycle due to the lower voltage available to ramp up the current in the output inductor.
VIN Undervoltage Lockout
Traditionally, transformer core saturation has been avoided The RUN pin of the LTC3765 has precise thresholds and both by limiting the maximum duty cycle of the converter programmable hysteresis, which allows it to be used as an and by slowing down the loop to limit the rate at which accurate voltage monitor on the input supply. An external the duty cycle changes. Limiting the maximum duty cycle resistive divider from VIN to the RUN pin ensures that helps the converter avoid saturation for a load step at low operation is disabled when VIN is too low. input voltage since the duty cycle maximum is clamped; Additionally, when the RUN pin is below its threshold, a however, transformer saturation can also easily occur 5µA current is pulled by the pin. This current, combined at higher input voltage where the maximum duty cycle with the external resistive divider, increases the hysteresis clamp is ineffective. Limiting the rate of duty cycle change beyond the internal minimum of 4%. in the loop to a point at which the active clamp capacitor can sufficiently track the change in duty cycle results in
Soft-Start
a very poor transient response of the overall converter. Furthermore, this technique is not guaranteed to prevent The SSFLT pin combines a programmable soft-start ramp transformer saturation under all operating conditions. for self-starting applications with a fault indicator. If either Neither of these traditional techniques will prevent the the VCC or the RUN pin voltages are below their thresholds, transformer from saturating when starting up into a pre- the SSFLT pin is internally grounded. When both of these biased output, where the duty cycle can quickly change voltages rise above their thresholds, the SSFLT pin is from 0% to 75%. released and current flows out of the pin into an external capacitor. As the capacitor charges from 1V to 3V, the The LTC3765 and LTC3766 implement a new unique system duty cycle of the gate drivers increases linearly from 0% for monitoring and directly limiting the flux accumulation to 70%, with a switching frequency set by a resistor from in the transformer core. During a reset cycle, when the ac- FSUV to ground. The LTC3766 should begin sending pulses tive clamp PMOS is on, the magnetizing current is directly and take control of the duty cycle before the soft-start pin measured and limited through a sense resistor in series reaches 3V; however, if the voltage reaches 3.5V, the linear with the PMOS source. When the PMOS turns off and regulator turns off to avoid excessive power dissipation in the main NMOS switch turns on, the LTC3765 generates the linear regulator pass device. With the linear regulator an accurate internal estimate of the magnetizing current off, the supply will soon drop below the VCC falling UVLO based on the sensed input voltage on the RUN pin and threshold, and the LTC3765 will fault and restart. transformer core parameters customized to the particular 3765fb 10 For more information www.linear.com/LTC3765 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts