Datasheet LT3958 (Analog Devices) - 10

ManufacturerAnalog Devices
DescriptionHigh Input Voltage, Boost, Flyback, SEPIC and Inverting Converter
Pages / Page30 / 10 — applicaTions inForMaTion. Main Control Loop. Programming Turn-On and …
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applicaTions inForMaTion. Main Control Loop. Programming Turn-On and Turn-Off Thresholds with. the EN/UVLO Pin

applicaTions inForMaTion Main Control Loop Programming Turn-On and Turn-Off Thresholds with the EN/UVLO Pin

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LT3958
applicaTions inForMaTion Main Control Loop
The LT3958 has overvoltage protection functions to The LT3958 uses a fixed frequency, current mode control protect the converter from excessive output voltage scheme to provide excellent line and load regulation. Op- overshoot during start-up or recovery from a short-circuit eration can be best understood by referring to the Block condition. An overvoltage comparator A11 (with 20mV Diagram in Figure 1. hysteresis) senses when the FBX pin voltage exceeds the positive regulated voltage (1.6V) by 8% and provides a The start of each oscillator cycle sets the SR latch (SR1) reset pulse. Similarly, an overvoltage comparator A12 and turns on the internal power MOSFET switch M1 through (with 10mV hysteresis) senses when the FBX pin voltage driver G2. The switch current flows through the internal exceeds the negative regulated voltage (–0.8V) by 11% current sensing resistor RSENSE and generates a voltage and provides a reset pulse. Both reset pulses are sent to proportional to the switch current. This current sense the main RS latch (SR1) through G6 and G5. The power voltage VISENSE (amplified by A5) is added to a stabilizing MOSFET switch M1 is actively held off for the duration of slope compensation ramp and the resulting sum (SLOPE) an output overvoltage condition. is fed into the positive terminal of the PWM comparator A7. When SLOPE exceeds the level at the negative input of A7
Programming Turn-On and Turn-Off Thresholds with
(VC pin), SR1 is reset, turning off the power switch. The
the EN/UVLO Pin
level at the negative input of A7 is set by the error amplifier The EN/UVLO pin controls whether the LT3958 is enabled A1 (or A2) and is an amplified version of the difference or is in shutdown state. A micropower 1.22V reference, between the feedback voltage (FBX pin) and the reference a comparator A10 and a controllable current source I voltage (1.6V or –0.8V, depending on the configuration). S1 allow the user to accurately program the supply voltage In this manner, the error amplifier sets the correct peak at which the IC turns on and off. The falling value can be switch current level to keep the output in regulation. accurately set by the resistor dividers R3 and R4. When The LT3958 has a switch current limit function. The current EN/UVLO is above 0.4V, and below the 1.22V threshold, sense voltage is input to the current limit comparator A6. the small pull-down current source IS1 (typical 2µA) is If the SENSE2 pin voltage is higher than the sense current active. limit threshold VSENSE(MAX) (48mV, typical), A6 will reset The purpose of this current is to allow the user to program SR1 and turn off M1 immediately. the rising hysteresis. The Block Diagram of the comparator The LT3958 is capable of generating either positive or and the external resistors is shown in Figure 1. The typical negative output voltage with a single FBX pin. It can be falling threshold voltage and rising threshold voltage can configured as a boost, flyback or SEPIC converter to gen- be calculated by the following equations: erate positive output voltage, or as an inverting converter (R3 +R4) to generate negative output voltage. When configured as VVIN,FALLING =1.22 • a SEPIC converter, as shown in Figure 1, the FBX pin is R4 pulled up to the internal bias voltage of 1.6V by a volt- VVIN,RISING = 2µA •R3+ VIN,FALLING age divider (R1 and R2) connected from VOUT to SGND. Comparator A2 becomes inactive and comparator A1 For applications where the EN/UVLO pin is only used as performs the inverting amplification from FBX to VC. a logic input, the EN/UVLO pin can be connected directly When the LT3958 is in an inverting configuration, the to the input voltage VIN through a 1k resistor for always- FBX pin is pulled down to –0.8V by a voltage divider on operation. connected from VOUT to SGND. Comparator A1 becomes inactive and comparator A2 performs the noninverting amplification from FBX to VC. 3958fa 10 For more information www.linear.com/LT3958 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Typical Applications Related Parts