Datasheet LT3439 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Slew Rate Controlled Ultralow Noise 1A Isolated DC/DC Transformer Driver |
| Pages / Page | 12 / 9 — APPLICATIO S I FOR ATIO. Transformer Design Example. Winding Resistance. … |
| File Format / Size | PDF / 196 Kb |
| Document Language | English |
APPLICATIO S I FOR ATIO. Transformer Design Example. Winding Resistance. Leakage Inductance. Transformer Imbalance
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LT3439
U U W U APPLICATIO S I FOR ATIO
current. This can be accomplished by adding more turns of the switching cycle do not match, the transformer’s flux onto a given core or selecting a new core with a higher level walks up the BH curve and the transformer goes into inductance per turn squared characteristic (AL). saturation. This is undesirable because the effective mag- netizing inductance drops off and the magnetizing current The following equation can be used to set the transformer increases rapidly. Fortunately, there are parasitics in the primary inductance: circuit that counteract the transformer saturation. When t the transformer begins to saturate the magnetizing cur- L = V ON PRI IN ∆I rent increases in one half of the switching cycle and therefore, the IR drops increase thereby reducing the volt/ tON can be calculated by 1/fOSC. second product of that half cycle. The transformer balance ∆I is somewhat arbitrary but a general rule of thumb is to is maintained. Also, the losses in the transformer and the set it between 10% to 30% of IPRI where IPRI is calculated main switches have positive temperature coefficients elimi- as follows: nating the potential for thermal runaway. The LT3439 can compensate for small circuit imbalances, however care V I I OUT OUT should be taken to balance both sides of the circuit PRI = • V Eff IN including transformer design and PCB layout. Eff can be estimated at 70%.
Transformer Design Example Winding Resistance
The following is an example of the design of a DC trans- former for a 5V to 5V at 500mA supply. Resistance in either the primary or secondary winding will reduce overall efficiency and degrade load regulation. If Supply specs: VIN = 5V, VOUT = 5V, IOUT = 500mA, efficiency or load regulation is unsatisfactory, verify that fOSC = 100kHz the voltage drops in the transformer windings are not Assume: VF = 0.5V (forward voltage of output diode) excessive. Efficiency ≈ 70%
Leakage Inductance
Calculate the primary switch current (IPRI): When the output switches turn off, the transformer leak- V • I 5V • m 500 A OUT OUT age inductance causes a voltage spike on the output I = = = 0.714A PRI V Eff 5V • 7 % 0 switch collector. The size of the voltage spike is propor- IN tional to the magnitude of the leakage inductance and to The “Switch Voltage Drop vs Switch Current” Typical the square of the load current (energy stored in the leakage Performance curve gives a typical value of the switch inductance). The voltage spike should be limited so that it voltage drop (VSW) for a given switch current (IPRI). In this does not exceed the voltage breakdown of the output example, IPRI ≈ 0.7A, therefore VSW ≈ 0.5V. switches. This can be accomplished by reducing the Next, calculate the turns ratio: transformer’s leakage inductance or by reducing the maxi- mum slew rate. The voltage slew control will limit the N V V 5V . 0 5V S OUT F = + = + = . 1 22 voltage spike by dissipating the leakage energy in the N V – V 5V – . 0 5V P IN SW power switches. Add 15% margin to account for winding resistance of the
Transformer Imbalance
transformer: A common concern for the push-pull topology is trans- NS = 1 2.2+15% = 1 4.1 former imbalance. If the volt/second products of each half NP sn3439 3439fs 9
U U W U APPLICATIO S I FOR ATIO
current. This can be accomplished by adding more turns of the switching cycle do not match, the transformer’s flux onto a given core or selecting a new core with a higher level walks up the BH curve and the transformer goes into inductance per turn squared characteristic (AL). saturation. This is undesirable because the effective mag- netizing inductance drops off and the magnetizing current The following equation can be used to set the transformer increases rapidly. Fortunately, there are parasitics in the primary inductance: circuit that counteract the transformer saturation. When t the transformer begins to saturate the magnetizing cur- L = V ON PRI IN ∆I rent increases in one half of the switching cycle and therefore, the IR drops increase thereby reducing the volt/ tON can be calculated by 1/fOSC. second product of that half cycle. The transformer balance ∆I is somewhat arbitrary but a general rule of thumb is to is maintained. Also, the losses in the transformer and the set it between 10% to 30% of IPRI where IPRI is calculated main switches have positive temperature coefficients elimi- as follows: nating the potential for thermal runaway. The LT3439 can compensate for small circuit imbalances, however care V I I OUT OUT should be taken to balance both sides of the circuit PRI = • V Eff IN including transformer design and PCB layout. Eff can be estimated at 70%.
Transformer Design Example Winding Resistance
The following is an example of the design of a DC trans- former for a 5V to 5V at 500mA supply. Resistance in either the primary or secondary winding will reduce overall efficiency and degrade load regulation. If Supply specs: VIN = 5V, VOUT = 5V, IOUT = 500mA, efficiency or load regulation is unsatisfactory, verify that fOSC = 100kHz the voltage drops in the transformer windings are not Assume: VF = 0.5V (forward voltage of output diode) excessive. Efficiency ≈ 70%
Leakage Inductance
Calculate the primary switch current (IPRI): When the output switches turn off, the transformer leak- V • I 5V • m 500 A OUT OUT age inductance causes a voltage spike on the output I = = = 0.714A PRI V Eff 5V • 7 % 0 switch collector. The size of the voltage spike is propor- IN tional to the magnitude of the leakage inductance and to The “Switch Voltage Drop vs Switch Current” Typical the square of the load current (energy stored in the leakage Performance curve gives a typical value of the switch inductance). The voltage spike should be limited so that it voltage drop (VSW) for a given switch current (IPRI). In this does not exceed the voltage breakdown of the output example, IPRI ≈ 0.7A, therefore VSW ≈ 0.5V. switches. This can be accomplished by reducing the Next, calculate the turns ratio: transformer’s leakage inductance or by reducing the maxi- mum slew rate. The voltage slew control will limit the N V V 5V . 0 5V S OUT F = + = + = . 1 22 voltage spike by dissipating the leakage energy in the N V – V 5V – . 0 5V P IN SW power switches. Add 15% margin to account for winding resistance of the
Transformer Imbalance
transformer: A common concern for the push-pull topology is trans- NS = 1 2.2+15% = 1 4.1 former imbalance. If the volt/second products of each half NP sn3439 3439fs 9
