Datasheet LTC3900 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | Synchronous Rectifier Driver for Forward Converters |
| Pages / Page | 20 / 10 — applicaTions inForMaTion. SYNC Input. Figure 7. SYNC Input Circuit. … |
| File Format / Size | PDF / 288 Kb |
| Document Language | English |
applicaTions inForMaTion. SYNC Input. Figure 7. SYNC Input Circuit. Figure 6b. Continuous Current Mode Operation
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Text Version of Document
LTC3900
applicaTions inForMaTion
The value of the resistors, RCS1, RCS2 and RCS3, should To minimize this delay and error, do not use resistance be calculated using the following formulas to meet both value higher than required and make the PCB trace from the threshold and clamp voltage requirements: the resistors to the LTC3900 CS+/CS– pins as short as k = 48 • I possible. Add a series resistor, RCS3 with value equal to RIPPLE • RDS(ON) –1 parallel sum of RCS1 and RCS2 to the CS– pin and connect RCS2 = {200 • VIN(MAX) • (NS/NP) –2200 • (1 + k)} /k the other end of RCS3 directly to the source of Q4. RCS1 = k • RCS2
SYNC Input
RCS3 = {RCS1 • RCS2} / {RCS1 + RCS2} Figure 7 shows the external circuit for the LTC3900 SYNC If k = 0 or less than zero, RCS2 is not needed and RCS1 input. With a selected type of pulse transformers, the = RCS3 = {VIN(MAX) • (NS/NP) – 11V} / 5mA values of the CSG and RSYNC should be adjusted to obtain where: an optimum SYNC pulse amplitude and width. A bigger capacitor, C I SG, generates a higher and wider SYNC pulse. RIPPLE = Inductor peak-to-peak ripple current The peak of this pulse should be much higher than the typi- RDS(ON) = On-resistance of Q4 at IRIPPLE/2 cal LTC3900 SYNC threshold of ±1.4V. Amplitudes greater than ±5V will help to speed up the SYNC comparator and VIN(MAX) = Primary side main supply maximum input reduce the SYNC to drivers propagation delay. The pulse voltage width should be wider than 75ns. Overshoot during the NS/NP = Power transformer T1, turn ratio pulse transformer reset interval must be minimized and If the LTC3900 still operates in discontinuous mode with kept below the minimum SYNC threshold of ±1V. The the calculated resistance value, increase the value of R amount of overshoot can be reduced by having a smaller CS1 to raise the threshold. The resistors R RSYNC. CS1 and RCS2 and the CS+ pins input capacitance plus the PCB trace capacitance form an R-C delay; this slows down the response time of the comparator. The resistors and CS+ input leakage CSG currents also create an input offset error. 220pF PRIMARY T2 CONTROLLER LTC3900 SG SYNC R (S SYNC OUT) 470Ω T2: COILCRAFT Q4470B OR PULSE P0926 3900 F07 SYNC
Figure 7. SYNC Input Circuit
FG CG INDUCTOR 0A CURRENT ADJUSTED CURRENT SENSE THRESHOLD 3900 F06b
Figure 6b. Continuous Current Mode Operation with Adjusted Current Sense Threshold
3900fb 10 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
applicaTions inForMaTion
The value of the resistors, RCS1, RCS2 and RCS3, should To minimize this delay and error, do not use resistance be calculated using the following formulas to meet both value higher than required and make the PCB trace from the threshold and clamp voltage requirements: the resistors to the LTC3900 CS+/CS– pins as short as k = 48 • I possible. Add a series resistor, RCS3 with value equal to RIPPLE • RDS(ON) –1 parallel sum of RCS1 and RCS2 to the CS– pin and connect RCS2 = {200 • VIN(MAX) • (NS/NP) –2200 • (1 + k)} /k the other end of RCS3 directly to the source of Q4. RCS1 = k • RCS2
SYNC Input
RCS3 = {RCS1 • RCS2} / {RCS1 + RCS2} Figure 7 shows the external circuit for the LTC3900 SYNC If k = 0 or less than zero, RCS2 is not needed and RCS1 input. With a selected type of pulse transformers, the = RCS3 = {VIN(MAX) • (NS/NP) – 11V} / 5mA values of the CSG and RSYNC should be adjusted to obtain where: an optimum SYNC pulse amplitude and width. A bigger capacitor, C I SG, generates a higher and wider SYNC pulse. RIPPLE = Inductor peak-to-peak ripple current The peak of this pulse should be much higher than the typi- RDS(ON) = On-resistance of Q4 at IRIPPLE/2 cal LTC3900 SYNC threshold of ±1.4V. Amplitudes greater than ±5V will help to speed up the SYNC comparator and VIN(MAX) = Primary side main supply maximum input reduce the SYNC to drivers propagation delay. The pulse voltage width should be wider than 75ns. Overshoot during the NS/NP = Power transformer T1, turn ratio pulse transformer reset interval must be minimized and If the LTC3900 still operates in discontinuous mode with kept below the minimum SYNC threshold of ±1V. The the calculated resistance value, increase the value of R amount of overshoot can be reduced by having a smaller CS1 to raise the threshold. The resistors R RSYNC. CS1 and RCS2 and the CS+ pins input capacitance plus the PCB trace capacitance form an R-C delay; this slows down the response time of the comparator. The resistors and CS+ input leakage CSG currents also create an input offset error. 220pF PRIMARY T2 CONTROLLER LTC3900 SG SYNC R (S SYNC OUT) 470Ω T2: COILCRAFT Q4470B OR PULSE P0926 3900 F07 SYNC
Figure 7. SYNC Input Circuit
FG CG INDUCTOR 0A CURRENT ADJUSTED CURRENT SENSE THRESHOLD 3900 F06b
Figure 6b. Continuous Current Mode Operation with Adjusted Current Sense Threshold
3900fb 10 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
