Datasheet LTM4620A (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | Dual 13A or Single 26A DC/DC µModule Regulator |
| Pages / Page | 40 / 8 — PIN FUNCTIONS (Recommended to Use Test Points to Monitor Signal Pin … |
| File Format / Size | PDF / 725 Kb |
| Document Language | English |
PIN FUNCTIONS (Recommended to Use Test Points to Monitor Signal Pin Connections.)
Model Line for this Datasheet
Text Version of Document
LTM4620A
PIN FUNCTIONS (Recommended to Use Test Points to Monitor Signal Pin Connections.) PACKAGE ROW AND COLUMN LABELING MAY VARY VFB1, VFB2 (D5, D7):
The Negative Input of the Error
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
Amplifier for Each Channel. Internally, this pin is con-
LAYOUT CAREFULLY.
nected to VOUTS1 or VOUTS2 with a 60.4kΩ precision
V
resistor. Different output voltages can be programmed
OUT1 (A1-A5, B1-B5, C1-C4):
Power Output Pins. Apply output load between these pins and GND pins. with an additional resistor between VFB and GND pins. In Recommend placing output decoupling capacitance PolyPhase® operation, tying the VFB pins together allows directly between these pins and GND pins. Review Table for parallel operation. See the Applications Information 5. See Note 8 in the Electrical Characteristics section for section for details. output current guideline.
TRACK1, TRACK2 (E5, D8):
Output Voltage Tracking Pin
GND (A6-A7, B6-B7, D1-D4, D9-D12, E1-E4, E10-E12,
and Soft-Start Inputs. Each channel has a 1.3µA pull-up
F1-F3, F10-F12, G1, G3, G10, G12, H1-H7, H9-H12, J1,
current source. When one channel is configured to be
J5, J8, J12, K1, K5-K8, K12, L1, L12, M1 , M12):
Power master of the two channels, then a capacitor from this pin Ground Pins for Both Input and Output Returns. to ground will set a soft-start ramp rate. The remaining channel can be set up as the slave, and have the master’s
VOUT2 (A8-A12, B8-B12, C9-C12):
Power Output Pins. output applied through a voltage divider to the slave out- Apply output load between these pins and GND pins. put’s track pin. This voltage divider is equal to the slave Recommend placing output decoupling capacitance output’s feedback divider for coincidental tracking. See directly between these pins and GND pins. Review Table 5. the Applications Information section. See Note 8 in the Electrical Characteristics section for output current guideline.
COMP1, COMP2 (E6, E7):
Current control threshold and error amplifier compensation point for each channel. The
VOUTS1, VOUTS2 (C5, C8):
This pin is connected to the top current comparator threshold increases with this control of the internal top feedback resistor for each output. The voltage. Tie the COMP pins together for parallel operation. pin can be directly connected to its specific output, or The device is internal compensated. connected to DIFFOUT when the remote sense amplifier is used. In paralleling modules, one of the V
DIFFP (E8):
Positive input of the remote sense amplifier. OUTS pins is con- nected to the DIFFOUT pin in remote sensing or directly This pin is connected to the remote sense point of the to V output voltage. Diffamp can be used for ≤3.3V outputs. OUT with no remote sensing. It is very important to connect these pins to either the DIFFOUT or V See the Applications Information section. OUT since this is the feedback path, and cannot be left open. See the
DIFFN (E9):
Negative input of the remote sense amplifier. Applications Information section. This pin is connected to the remote sense point of the
f
output GND. Diffamp can be used for ≤3.3V outputs. See
SET (C6):
Frequency Set Pin. A 10µA current is sourced from this pin. A resistor from this pin to ground sets a the Applications Information section. voltage that in turn programs the operating frequency.
MODE_PLLIN (F4):
Force Continuous Mode, Burst Mode Alternatively, this pin can be driven with a DC voltage Operation, or Pulse-Skipping Mode Selection Pin and that can set the operating frequency. See the Applications External Synchronization Input to Phase Detector Pin. Information section. Connect this pin to SGND to force both channels into
SGND (C7, D6, G6-G7, F6-F7):
Signal Ground Pin. Return force continuous mode of operation. Connect to INTVCC ground path for all analog and low power circuitry. Tie to enable pulse-skipping mode of operation. Leaving the a single connection to the output capacitor GND in the pin floating will enable Burst Mode operation. A clock on application. See layout guidelines in Figure 25. the pin will force both channels into continuous mode of operation and synchronized to the external clock applied to this pin. 4620afc 8 For more information www.linear.com/LTM4620A Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Package Photo Related Parts Design Resources
PIN FUNCTIONS (Recommended to Use Test Points to Monitor Signal Pin Connections.) PACKAGE ROW AND COLUMN LABELING MAY VARY VFB1, VFB2 (D5, D7):
The Negative Input of the Error
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
Amplifier for Each Channel. Internally, this pin is con-
LAYOUT CAREFULLY.
nected to VOUTS1 or VOUTS2 with a 60.4kΩ precision
V
resistor. Different output voltages can be programmed
OUT1 (A1-A5, B1-B5, C1-C4):
Power Output Pins. Apply output load between these pins and GND pins. with an additional resistor between VFB and GND pins. In Recommend placing output decoupling capacitance PolyPhase® operation, tying the VFB pins together allows directly between these pins and GND pins. Review Table for parallel operation. See the Applications Information 5. See Note 8 in the Electrical Characteristics section for section for details. output current guideline.
TRACK1, TRACK2 (E5, D8):
Output Voltage Tracking Pin
GND (A6-A7, B6-B7, D1-D4, D9-D12, E1-E4, E10-E12,
and Soft-Start Inputs. Each channel has a 1.3µA pull-up
F1-F3, F10-F12, G1, G3, G10, G12, H1-H7, H9-H12, J1,
current source. When one channel is configured to be
J5, J8, J12, K1, K5-K8, K12, L1, L12, M1 , M12):
Power master of the two channels, then a capacitor from this pin Ground Pins for Both Input and Output Returns. to ground will set a soft-start ramp rate. The remaining channel can be set up as the slave, and have the master’s
VOUT2 (A8-A12, B8-B12, C9-C12):
Power Output Pins. output applied through a voltage divider to the slave out- Apply output load between these pins and GND pins. put’s track pin. This voltage divider is equal to the slave Recommend placing output decoupling capacitance output’s feedback divider for coincidental tracking. See directly between these pins and GND pins. Review Table 5. the Applications Information section. See Note 8 in the Electrical Characteristics section for output current guideline.
COMP1, COMP2 (E6, E7):
Current control threshold and error amplifier compensation point for each channel. The
VOUTS1, VOUTS2 (C5, C8):
This pin is connected to the top current comparator threshold increases with this control of the internal top feedback resistor for each output. The voltage. Tie the COMP pins together for parallel operation. pin can be directly connected to its specific output, or The device is internal compensated. connected to DIFFOUT when the remote sense amplifier is used. In paralleling modules, one of the V
DIFFP (E8):
Positive input of the remote sense amplifier. OUTS pins is con- nected to the DIFFOUT pin in remote sensing or directly This pin is connected to the remote sense point of the to V output voltage. Diffamp can be used for ≤3.3V outputs. OUT with no remote sensing. It is very important to connect these pins to either the DIFFOUT or V See the Applications Information section. OUT since this is the feedback path, and cannot be left open. See the
DIFFN (E9):
Negative input of the remote sense amplifier. Applications Information section. This pin is connected to the remote sense point of the
f
output GND. Diffamp can be used for ≤3.3V outputs. See
SET (C6):
Frequency Set Pin. A 10µA current is sourced from this pin. A resistor from this pin to ground sets a the Applications Information section. voltage that in turn programs the operating frequency.
MODE_PLLIN (F4):
Force Continuous Mode, Burst Mode Alternatively, this pin can be driven with a DC voltage Operation, or Pulse-Skipping Mode Selection Pin and that can set the operating frequency. See the Applications External Synchronization Input to Phase Detector Pin. Information section. Connect this pin to SGND to force both channels into
SGND (C7, D6, G6-G7, F6-F7):
Signal Ground Pin. Return force continuous mode of operation. Connect to INTVCC ground path for all analog and low power circuitry. Tie to enable pulse-skipping mode of operation. Leaving the a single connection to the output capacitor GND in the pin floating will enable Burst Mode operation. A clock on application. See layout guidelines in Figure 25. the pin will force both channels into continuous mode of operation and synchronized to the external clock applied to this pin. 4620afc 8 For more information www.linear.com/LTM4620A Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Package Photo Related Parts Design Resources
