Datasheet LTM4606 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | Ultralow EMI 28VIN, 6A DC/DC μModule Regulator |
| Pages / Page | 28 / 7 — Typical perForMance characTerisTics. Input Ripple. Output Ripple. pin … |
| File Format / Size | PDF / 616 Kb |
| Document Language | English |
Typical perForMance characTerisTics. Input Ripple. Output Ripple. pin FuncTions. PACKAGE ROW AND COLUMN LABELING MAY VARY
Model Line for this Datasheet
Text Version of Document
LTM4606
Typical perForMance characTerisTics Input Ripple Output Ripple
V VOUT IN 10mV/DIV 2mV/DIV 2µs/DIV 4606 G17 VIN = 5V 2µs/DIV 4606 G18 VIN = 5V VOUT = 1V AT 6A VOUT = 1V AT 6A CIN = 3× 10µF, 25V CERAMIC COUT = 2× 22µF, 6.3V CERAMIC 1× 150µF BULK 1× 100µF, 6.3V CERAMIC BW = 300MHz BW = 300MHz
pin FuncTions PACKAGE ROW AND COLUMN LABELING MAY VARY PLLIN (Pin A8):
External Clock Synchronization Input to
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
the Phase Detector. This pin is internally terminated to
LAYOUT CAREFULLY.
SGND with a 50k resistor. Apply a clock with high level
V
above 2V and below INTV
IN (Bank 1):
Power Input Pins. Apply input voltage be- CC. See the Applications Infor- tween these pins and PGND pins. Recommend placing mation section. input decoupling capacitance directly between VIN pins
FCB (Pin M12):
Forced Continuous Input. Connect this pin and PGND pins. to SGND to force continuous synchronization operation at
V
low load, to INTV
OUT (Bank 3):
Power Output Pins. Apply output load CC to enable discontinuous mode opera- between these pins and PGND pins. Recommend placing tion at low load or to a resistive divider from a secondary output decoupling capacitance directly between these pins output when using a secondary winding. and PGND pins (see Figure 17).
TRACK/SS (Pin A9):
Output Voltage Tracking and Soft-Start
PGND (Bank 2):
Power Ground Pins for Both Input and Pin. When the module is configured as a master output, Output Returns. then a soft-start capacitor is placed on this pin to ground to control the master ramp rate. A soft-start capacitor can
VD (Pins B7, C7):
Top FET Drain Pins. Add more capacitors be used for soft-start turn-on in a standalone regulator. between VD and ground to handle the input RMS current Slave operation is performed by putting a resistor divider and reduce the input ripple further. from the master output to ground, and connecting the
DRVCC (Pins C10, E11, E12):
These pins normally con- center point of the divider to this pin. See the Applications nect to INTVCC for powering the internal MOSFET drivers. Information section. They can be biased up to 6V from an external supply with
MPGM (Pins A12, B11):
Programmable Margining Input. about 50mA capability, or an external circuit as shown in A resistor from these pins to ground sets a current that Figure 18. This improves efficiency at the higher input is equal to 1.18V/R. This current multiplied by 10kW will voltages by reducing power dissipation in the module. equal a value in millivolts that is a percentage of the 0.6V
INTVCC (Pin A7):
This pin is for additional decoupling of reference voltage. See the Applications Information section. the 5V internal regulator. To parallel LTM4606s, each requires an individual MPGM resistor. Do not tie MPGM pins together. 4606fd For more information www.linear.com/LTM4606 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Revision History Package Photograph Related Parts
Typical perForMance characTerisTics Input Ripple Output Ripple
V VOUT IN 10mV/DIV 2mV/DIV 2µs/DIV 4606 G17 VIN = 5V 2µs/DIV 4606 G18 VIN = 5V VOUT = 1V AT 6A VOUT = 1V AT 6A CIN = 3× 10µF, 25V CERAMIC COUT = 2× 22µF, 6.3V CERAMIC 1× 150µF BULK 1× 100µF, 6.3V CERAMIC BW = 300MHz BW = 300MHz
pin FuncTions PACKAGE ROW AND COLUMN LABELING MAY VARY PLLIN (Pin A8):
External Clock Synchronization Input to
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
the Phase Detector. This pin is internally terminated to
LAYOUT CAREFULLY.
SGND with a 50k resistor. Apply a clock with high level
V
above 2V and below INTV
IN (Bank 1):
Power Input Pins. Apply input voltage be- CC. See the Applications Infor- tween these pins and PGND pins. Recommend placing mation section. input decoupling capacitance directly between VIN pins
FCB (Pin M12):
Forced Continuous Input. Connect this pin and PGND pins. to SGND to force continuous synchronization operation at
V
low load, to INTV
OUT (Bank 3):
Power Output Pins. Apply output load CC to enable discontinuous mode opera- between these pins and PGND pins. Recommend placing tion at low load or to a resistive divider from a secondary output decoupling capacitance directly between these pins output when using a secondary winding. and PGND pins (see Figure 17).
TRACK/SS (Pin A9):
Output Voltage Tracking and Soft-Start
PGND (Bank 2):
Power Ground Pins for Both Input and Pin. When the module is configured as a master output, Output Returns. then a soft-start capacitor is placed on this pin to ground to control the master ramp rate. A soft-start capacitor can
VD (Pins B7, C7):
Top FET Drain Pins. Add more capacitors be used for soft-start turn-on in a standalone regulator. between VD and ground to handle the input RMS current Slave operation is performed by putting a resistor divider and reduce the input ripple further. from the master output to ground, and connecting the
DRVCC (Pins C10, E11, E12):
These pins normally con- center point of the divider to this pin. See the Applications nect to INTVCC for powering the internal MOSFET drivers. Information section. They can be biased up to 6V from an external supply with
MPGM (Pins A12, B11):
Programmable Margining Input. about 50mA capability, or an external circuit as shown in A resistor from these pins to ground sets a current that Figure 18. This improves efficiency at the higher input is equal to 1.18V/R. This current multiplied by 10kW will voltages by reducing power dissipation in the module. equal a value in millivolts that is a percentage of the 0.6V
INTVCC (Pin A7):
This pin is for additional decoupling of reference voltage. See the Applications Information section. the 5V internal regulator. To parallel LTM4606s, each requires an individual MPGM resistor. Do not tie MPGM pins together. 4606fd For more information www.linear.com/LTM4606 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Revision History Package Photograph Related Parts
