LTM8023 PIN FUNCTIONSVIN (Bank 1): The VIN pin supplies current to the LTM8023’s large impact on the thermal performance of the part. See internal regulator and to the internal power switch. This the PCB Layout and Thermal Consideration sections for pin must be locally bypassed with an external, low ESR more details. Return the feedback divider (RADJ) to this net. capacitor of at least 2.2µF. RT (Pin G7): The RT pin is used to program the switching VOUT (Bank 2): Power Output Pins. Apply the output filter frequency of the LTM8023 by connecting a resistor from capacitor and the output load between these pins and this pin to ground. The Applications Information section of GND pins. the data sheet includes a table to determine the resistance AUX (Pin F5): Low Current Voltage Source for BIAS. The value based on the desired switching frequency. Minimize V capacitance at this pin. AUX pin is internally connected to VOUT and is placed adjacent to the BIAS pin to ease printed circuit board SHARE (Pin F7): Tie this to the SHARE pin of another routing. Although this pin is internally connected to VOUT, LTM8023 when paralleling the outputs. Otherwise, do not do NOT connect this pin to the load. If this pin is not tied connect (leave floating). to BIAS, leave it floating. SYNC (Pin G6): This is the external clock synchronization BIAS (Pin G5): The BIAS pin connects to the internal power input. Ground this pin for low ripple Burst Mode® operation bus. Connect to a power source greater than 2.8V. If the at low output loads. Tie to a stable voltage source greater output is greater than 2.8V, connect this pin there. If the than 0.7V to disable Burst Mode operation. Do not leave output voltage is less, connect this to a voltage source this pin floating. Tie to a clock source for synchronization. between 2.8V and 16V. Also, make sure that BIAS + VIN Clock edges should have rise and fall times faster than 1µs. is less than 56V. See synchronizing section in Applications Information. RUN/SS (Pin H5): Tie RUN/SS pin to ground to shut down PGOOD (Pin H6): The PGOOD pin is the open-collector the LTM8023. Tie to 2.5V or more for normal operation. output of an internal comparator. PG remains low until If the shutdown feature is not used, tie this pin to the VIN the ADJ pin is within 10% of the final regulation voltage. pin. RUN/SS also provides a soft-start function; see the PG output is valid when VIN is above 3.6V and RUN/SS is Applications Information section. high. If this function is not used, leave this pin floating. GND (Bank 3): Tie these GND pins to a local ground plane ADJ (Pin H7): The LTM8023 regulates its ADJ pin to 0.79V. below the LTM8023 and the circuit components. In most Connect the adjust resistor from this pin to ground. The applications, the bulk of the heat flow out of the LTM8023 value of RADJ is given by the equation RADJ = 394.21/ is through these pads, so the printed circuit design has a (VOUT – 0.79), where RADJ is in kΩ. 8023fj For more information www.linear.com/LTM8023 7