Datasheet LTC7860 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | High Efficiency Switching Surge Stopper |
| Pages / Page | 26 / 9 — operaTion Power CAP and VIN Undervoltage Lockout (UVLO). Frequency … |
| File Format / Size | PDF / 843 Kb |
| Document Language | English |
operaTion Power CAP and VIN Undervoltage Lockout (UVLO). Frequency Selection. Shutdown and Soft-Start. Fault Protection
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LTC7860
operaTion Power CAP and VIN Undervoltage Lockout (UVLO)
If the slew rate of the SS pin is greater than 1.2V/ms, the Power for the P-channel MOSFET gate driver is derived output will track an internal soft-start ramp instead of the from the CAP pin. The CAP pin is regulated to 8V below SS pin. The internal soft-start will guarantee a smooth V start-up of the output under all conditions, including in the IN in order to provide efficient P-channel operation. The power for the V case of a short-circuit recovery where the output voltage CAP supply comes from an internal LDO, which regulates the V will recover from near ground. IN-CAP differential voltage. A mini- mum capacitance of 0.47µF (low ESR ceramic) is required
Frequency Selection
between VIN and CAP to assure stability. The switching frequency of the LTC7860 can be selected For VIN ≤ 8V, the LDO will be in dropout and the CAP volt- using the FREQ pin. The FREQ pin can be tied to signal age will be at ground, i.e., the VIN-CAP differential voltage ground, floated, or programmed through an external re- will equal VIN. If VIN-CAP is less than 3.25V (typical), the sistor. Tying FREQ pin to signal ground selects 350kHz, LTC7860 enters a UVLO state where the GATE is prevented while floating selects 535kHz. Placing a resistor between from switching and most internal circuitry is shut down. FREQ pin and signal ground allows the frequency to be In order to exit UVLO, the VIN-CAP voltage would have to programmed between 50kHz and 850kHz. Refer to the exceed 3.5V (typical). chart in the Application section for switching frequency
Shutdown and Soft-Start
versus resistor values. When the RUN pin is below 0.7V, the controller and most
Fault Protection
internal circuits are disabled. In this micropower shutdown In the event of an output short-circuit or overcurrent con- state, the LTC7860 draws only 7µA. Releasing the RUN pin dition that causes the output voltage to drop significantly allows a small internal pull-up current to pull the RUN pin while in current limit, the LTC7860 operating frequency above 1.26V and enable the controller. The RUN pin can will fold back. Anytime the output feedback V be pulled up to an external supply of up to 60V or driven FB voltage is less than 50% of the 0.8V internal reference (i.e., 0.4V), directly by logic levels. frequency foldback is active. The frequency will continue The start-up of the output voltage VOUT is controlled by to drop as VFB drops until reaching a minimum foldback the voltage on the SS pin. When the voltage on the SS frequency of about 18% of the setpoint frequency. Fre- pin is less than the 0.8V internal reference, the VFB pin quency foldback is designed, in combination with peak is regulated to the voltage on the SS pin. This allows the current limit, to limit current in start-up and short-circuit SS pin to be used to program a soft-start by connecting conditions. Setting the foldback frequency as a percentage an external capacitor from the SS pin to signal ground. of operating frequency assures that start-up characteristics An internal 10µA pull-up current charges this capacitor, scale appropriately with operating frequency. creating a voltage ramp on the SS pin. As the SS volt- age rises from 0V to 0.8V, the output voltage VOUT rises smoothly from zero to its final value. The SS time must be sufficiently less than the TMR set time to avert a timer shutdown in startup or fault recovery. 7860f For more information www.linear.com/LTC7860 9
operaTion Power CAP and VIN Undervoltage Lockout (UVLO)
If the slew rate of the SS pin is greater than 1.2V/ms, the Power for the P-channel MOSFET gate driver is derived output will track an internal soft-start ramp instead of the from the CAP pin. The CAP pin is regulated to 8V below SS pin. The internal soft-start will guarantee a smooth V start-up of the output under all conditions, including in the IN in order to provide efficient P-channel operation. The power for the V case of a short-circuit recovery where the output voltage CAP supply comes from an internal LDO, which regulates the V will recover from near ground. IN-CAP differential voltage. A mini- mum capacitance of 0.47µF (low ESR ceramic) is required
Frequency Selection
between VIN and CAP to assure stability. The switching frequency of the LTC7860 can be selected For VIN ≤ 8V, the LDO will be in dropout and the CAP volt- using the FREQ pin. The FREQ pin can be tied to signal age will be at ground, i.e., the VIN-CAP differential voltage ground, floated, or programmed through an external re- will equal VIN. If VIN-CAP is less than 3.25V (typical), the sistor. Tying FREQ pin to signal ground selects 350kHz, LTC7860 enters a UVLO state where the GATE is prevented while floating selects 535kHz. Placing a resistor between from switching and most internal circuitry is shut down. FREQ pin and signal ground allows the frequency to be In order to exit UVLO, the VIN-CAP voltage would have to programmed between 50kHz and 850kHz. Refer to the exceed 3.5V (typical). chart in the Application section for switching frequency
Shutdown and Soft-Start
versus resistor values. When the RUN pin is below 0.7V, the controller and most
Fault Protection
internal circuits are disabled. In this micropower shutdown In the event of an output short-circuit or overcurrent con- state, the LTC7860 draws only 7µA. Releasing the RUN pin dition that causes the output voltage to drop significantly allows a small internal pull-up current to pull the RUN pin while in current limit, the LTC7860 operating frequency above 1.26V and enable the controller. The RUN pin can will fold back. Anytime the output feedback V be pulled up to an external supply of up to 60V or driven FB voltage is less than 50% of the 0.8V internal reference (i.e., 0.4V), directly by logic levels. frequency foldback is active. The frequency will continue The start-up of the output voltage VOUT is controlled by to drop as VFB drops until reaching a minimum foldback the voltage on the SS pin. When the voltage on the SS frequency of about 18% of the setpoint frequency. Fre- pin is less than the 0.8V internal reference, the VFB pin quency foldback is designed, in combination with peak is regulated to the voltage on the SS pin. This allows the current limit, to limit current in start-up and short-circuit SS pin to be used to program a soft-start by connecting conditions. Setting the foldback frequency as a percentage an external capacitor from the SS pin to signal ground. of operating frequency assures that start-up characteristics An internal 10µA pull-up current charges this capacitor, scale appropriately with operating frequency. creating a voltage ramp on the SS pin. As the SS volt- age rises from 0V to 0.8V, the output voltage VOUT rises smoothly from zero to its final value. The SS time must be sufficiently less than the TMR set time to avert a timer shutdown in startup or fault recovery. 7860f For more information www.linear.com/LTC7860 9
