Datasheet LT8490 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | High Voltage, High Current Buck-Boost Battery Charge Controller with Maximum Power Point Tracking (MPPT) |
| Pages / Page | 42 / 8 — pin FuncTions FBIR (Pin 1):. CSN (Pin 12):. FAULT (Pin 2):. CSP (Pin … |
| File Format / Size | PDF / 707 Kb |
| Document Language | English |
pin FuncTions FBIR (Pin 1):. CSN (Pin 12):. FAULT (Pin 2):. CSP (Pin 13):. TEMPSENSE (Pin 3):. LDO33 (Pin 14):. FBIN (Pin 15):
Model Line for this Datasheet
Text Version of Document
LT8490
pin FuncTions FBIR (Pin 1):
A/D Input Pin. Connects to FBIN pin to
CSN (Pin 12):
The (–) Input to the Inductor Current Sense measure input feedback voltage. and Reverse Current Detect Amplifier.
FAULT (Pin 2):
FAULT Pin. This pin generates an active
CSP (Pin 13):
The (+) Input to the Inductor Current Sense high digital output that, when used with an LED, provides and Reverse Current Detect Amplifier. The VC pin voltage a visual indication of a fault event. and built-in offsets between the CSP and CSN pins set the
TEMPSENSE (Pin 3):
A/D Input Pin. Connects to a thermis- current trip threshold. tor divider network for sensing battery temperature or a
LDO33 (Pin 14):
3.3V Regulator Output. This supply resistor divider if unused. This pin is frequently monitored provides power to the VDD and AVDD pins. Bypass this for temperature compensation and enforcing temperature pin to ground with a minimum 4.7µF ceramic capacitor. limits.
FBIN (Pin 15):
Input Feedback Pin. This pin is connected
VDD (Pin 4):
Control Logic Power Supply Pin. Connect to the input error amplifier input. this pin to LDO33 and AVDD.
FBOUT (Pin 16):
Output Feedback Pin. This pin connects
FBOW (Pin 5):
PWM Digital Output Pin. Connects to FBOUT the error amplifier input to an external resistor divider through an RCR network to temperature compensate the from the output. battery voltage.
IMON_OUT (Pin 17):
Output Current Monitor Pin. The
FBIW (Pin 6):
PWM Digital Output Pin. Connects to FBIN current out of this pin is proportional to the average out- through an RCR network to adjust the solar panel volt- put current. See the Applications Information section for age for MPPT. more information.
INTVCC (Pin 7):
Internal 6.35V Regulator Output Pin. Con-
VC (Pin 18):
Error Amplifier Output Pin. Tie the external nects to the GATEVCC pin. INTVCC is powered from EXTVCC compensation network to this pin. when the EXTVCC voltage is higher than 6.4V, otherwise
SS (Pin 19):
Soft-Start Pin. Place 100nF of capacitance INTVCC is powered from VIN. Bypass this pin to ground from this pin to ground. Upon start-up, this pin will be with a minimum 4.7µF ceramic capacitor. See Switching charged by an internal resistor to 2.5V. Configuration - MODE Pin for additional details.
CLKOUT (Pin 20):
Switching Regulator Clock Output Pin.
SWEN (Pin 8):
Switch Enable Pin. Tie to the SWENO pin. CLKOUT will toggle at the same frequency as the switch-
MODE (Pin 9):
Mode Pin. The voltage applied to this pin ing regulator oscillator (OSC1 on the Block Diagram) or sets the operating mode of the switching regulator. Tie this as the SYNC pin, but is approximately 180° out-of-phase. pin to INTVCC to make discontinuous current mode active. CLKOUT can also be used as a temperature monitor of the Tie this pin to ground to operate in discontinuous current switching regulator since the CLKOUT duty cycle varies mode for low battery charging currents and continuous linearly with the junction temperature of the switching current mode for high battery charging currents. Do not regulator. It is connected to CLKDET through an RC filter. float this pin. See Switching Configuration - MODE Pin The CLKOUT pin can drive capacitive loads up to 200pF. for additional details.
SYNC (Pin 21):
To synchronize the switching frequency
IMON_IN (Pin 10):
Input Current Monitor Pin. The current to an outside clock, simply drive this pin with a clock. The out of this pin is proportional to the input current. See the high voltage level of the clock needs to exceed 1.3V, and Applications Information section for more information. the low level should be less than 0.5V. Drive this pin to
SHDN (Pin 11):
Shutdown Pin. In conjunction with the less than 0.5V to revert to the internal free-running clock UVLO (undervoltage lockout) circuit, this pin is used to (OSC1 in the Block Diagram). enable/disable the chip. Do not float this pin. 8490fa 8 For more information www.linear.com/LT8490 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts
pin FuncTions FBIR (Pin 1):
A/D Input Pin. Connects to FBIN pin to
CSN (Pin 12):
The (–) Input to the Inductor Current Sense measure input feedback voltage. and Reverse Current Detect Amplifier.
FAULT (Pin 2):
FAULT Pin. This pin generates an active
CSP (Pin 13):
The (+) Input to the Inductor Current Sense high digital output that, when used with an LED, provides and Reverse Current Detect Amplifier. The VC pin voltage a visual indication of a fault event. and built-in offsets between the CSP and CSN pins set the
TEMPSENSE (Pin 3):
A/D Input Pin. Connects to a thermis- current trip threshold. tor divider network for sensing battery temperature or a
LDO33 (Pin 14):
3.3V Regulator Output. This supply resistor divider if unused. This pin is frequently monitored provides power to the VDD and AVDD pins. Bypass this for temperature compensation and enforcing temperature pin to ground with a minimum 4.7µF ceramic capacitor. limits.
FBIN (Pin 15):
Input Feedback Pin. This pin is connected
VDD (Pin 4):
Control Logic Power Supply Pin. Connect to the input error amplifier input. this pin to LDO33 and AVDD.
FBOUT (Pin 16):
Output Feedback Pin. This pin connects
FBOW (Pin 5):
PWM Digital Output Pin. Connects to FBOUT the error amplifier input to an external resistor divider through an RCR network to temperature compensate the from the output. battery voltage.
IMON_OUT (Pin 17):
Output Current Monitor Pin. The
FBIW (Pin 6):
PWM Digital Output Pin. Connects to FBIN current out of this pin is proportional to the average out- through an RCR network to adjust the solar panel volt- put current. See the Applications Information section for age for MPPT. more information.
INTVCC (Pin 7):
Internal 6.35V Regulator Output Pin. Con-
VC (Pin 18):
Error Amplifier Output Pin. Tie the external nects to the GATEVCC pin. INTVCC is powered from EXTVCC compensation network to this pin. when the EXTVCC voltage is higher than 6.4V, otherwise
SS (Pin 19):
Soft-Start Pin. Place 100nF of capacitance INTVCC is powered from VIN. Bypass this pin to ground from this pin to ground. Upon start-up, this pin will be with a minimum 4.7µF ceramic capacitor. See Switching charged by an internal resistor to 2.5V. Configuration - MODE Pin for additional details.
CLKOUT (Pin 20):
Switching Regulator Clock Output Pin.
SWEN (Pin 8):
Switch Enable Pin. Tie to the SWENO pin. CLKOUT will toggle at the same frequency as the switch-
MODE (Pin 9):
Mode Pin. The voltage applied to this pin ing regulator oscillator (OSC1 on the Block Diagram) or sets the operating mode of the switching regulator. Tie this as the SYNC pin, but is approximately 180° out-of-phase. pin to INTVCC to make discontinuous current mode active. CLKOUT can also be used as a temperature monitor of the Tie this pin to ground to operate in discontinuous current switching regulator since the CLKOUT duty cycle varies mode for low battery charging currents and continuous linearly with the junction temperature of the switching current mode for high battery charging currents. Do not regulator. It is connected to CLKDET through an RC filter. float this pin. See Switching Configuration - MODE Pin The CLKOUT pin can drive capacitive loads up to 200pF. for additional details.
SYNC (Pin 21):
To synchronize the switching frequency
IMON_IN (Pin 10):
Input Current Monitor Pin. The current to an outside clock, simply drive this pin with a clock. The out of this pin is proportional to the input current. See the high voltage level of the clock needs to exceed 1.3V, and Applications Information section for more information. the low level should be less than 0.5V. Drive this pin to
SHDN (Pin 11):
Shutdown Pin. In conjunction with the less than 0.5V to revert to the internal free-running clock UVLO (undervoltage lockout) circuit, this pin is used to (OSC1 in the Block Diagram). enable/disable the chip. Do not float this pin. 8490fa 8 For more information www.linear.com/LT8490 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts
