Datasheet LT3796, LT3796-1 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 100V Constant-Current and Constant-Voltage Controller with Dual Current Sense |
| Pages / Page | 36 / 10 — pin FuncTions. ISP (Pin 1):. VC (Pin 8):. ISN (Pin 2):. TG (Pin 3):. CTRL … |
| File Format / Size | PDF / 522 Kb |
| Document Language | English |
pin FuncTions. ISP (Pin 1):. VC (Pin 8):. ISN (Pin 2):. TG (Pin 3):. CTRL (Pin 9):. GND (Pins 4, 17, 21, 22, Exposed Pad Pin 29):
Model Line for this Datasheet
Text Version of Document
LT3796/LT3796-1
pin FuncTions ISP (Pin 1):
Connection Point for the Positive Terminal
VC (Pin 8):
Transconductance Error Amplifier Output Pin. of the Current Feedback Resistor (RLED). Also serves as Used to stabilize the control loop with an RC network. positive rail for TG pin driver. This pin is high impedance when PWM is low, a feature
ISN (Pin 2):
Connection Point for the Negative Terminal that stores the demand current state variable for the next of the Current Feedback Resistor (R PWM high transition. Connect a capacitor between this LED). pin and GND; a resistor in series with the capacitor is
TG (Pin 3):
Top Gate Driver Output. An inverted PWM signal recommended for fast transient response. Do not leave drives series PMOS device between VISP and (VISP – 7V) this pin open. if VISP > 7V. An internal 7V clamp protects the PMOS gate by limiting VGS. Leave TG unconnected if not used.
CTRL (Pin 9):
Current Sense Threshold Adjustment Pin. Regulating threshold V(ISP-ISN) is 0.25 • VCTRL plus an offset
GND (Pins 4, 17, 21, 22, Exposed Pad Pin 29):
Ground. for 0.1V < VCTRL < 1V. For VCTRL > 1.2V the current sense These pins also serve as current sense input for control threshold is constant at the full-scale value of 250mV. For loop, sensing negative terminal of current sense resistor in 1V < VCTRL < 1.2V, the dependence of the current sense the source of the N-channel MOSFET. Solder the exposed threshold upon VCTRL transitions from a linear function pad directly to ground plane. to a constant value, reaching 98% of full-scale value by
ISMON (Pin 5):
ISP/ISN Current Report Pin. The LED VCTRL = 1.1V. Connect CTRL to VREF for the 250mV default current sensed by ISP/ISN inputs is reported as V current threshold. Do not leave this pin open. Pull CTRL ISMON = I pin to GND for zero LED current. LED • RLED • 4. Leave ISMON pin unconnected if not used. When PWM is low, ISMON is driven to ground. Bypass
VREF (Pin 10):
Voltage Reference Output Pin. Typically with a 47nF capacitor or higher if needed. 2.015V. This pin drives a resistor divider for the CTRL
FB2 (Pin 6):
Voltage Loop Feedback 2 Pin. This pin is pin, either for analog dimming or for temperature limit/ connected to the internal transconductance amplifier posi- compensation of LED load. It can supply up to 100μA. tive input node. The internal transconductance amplifier
SS (Pin 11):
Soft-Start Pin. This pin modulates oscillator with output VC regulates FB2 to 1.25V through the DC/ frequency and compensation pin voltage (VC) clamp. The DC converter. On LT3796 only, the FB2 has an additional soft-start interval is set with an external capacitor. The pin feature. If FB2 is driven above 1.3V, the TG pin is pulled has a 28μA (typical) pull-up current source to an internal high to turn off the external PMOS and GATE pin is driven 2.5V rail. This pin can be used as fault timer. Provided the to GND to turn off the external N-channel MOSFET. Connect SS pin has exceeded 1.7V, the pull-up current source is to GND if not used. disabled and a 2.8µA pull-down current enabled when any
FB1 (Pin 7):
Voltage Loop Feedback 1 Pin. FB1 is intended one of the following fault conditions happen: for constant-voltage regulation or for LED protection/open 1. LED overcurrent LED detection. The internal transconductance amplifier 2. INTVCC undervoltage with output VC regulates FB1 to 1.25V (nominal) through 3. Thermal limit the DC/DC converter. If the FB1 input is regulating the loop and V The SS pin must be discharged below 0.2V to reinitiate a (ISP-ISN) is less than 25mV (normal), the VMODE pull-down is asserted. This action may signal an open soft-start cycle. Switching is disabled until SS is recharged. LED fault. If FB1 is driven above the 1.3V (by an external
RT (Pin 12):
Switching Frequency Adjustment Pin. Set the power supply spike, for example), the FAULT pull-down is frequency using a resistor to GND (for resistor values, see asserted, the GATE pin is pulled low to turn off the external the Typical Performance curve or Table 2). Do not leave N-channel MOSFET and the TG pin is driven high to protect the RT pin open. the LEDs from an overcurrent event. Do not leave the FB1 pin open. If not used, connect FB1 to GND. 3796fb 10 For more information www.linear.com/3796 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
pin FuncTions ISP (Pin 1):
Connection Point for the Positive Terminal
VC (Pin 8):
Transconductance Error Amplifier Output Pin. of the Current Feedback Resistor (RLED). Also serves as Used to stabilize the control loop with an RC network. positive rail for TG pin driver. This pin is high impedance when PWM is low, a feature
ISN (Pin 2):
Connection Point for the Negative Terminal that stores the demand current state variable for the next of the Current Feedback Resistor (R PWM high transition. Connect a capacitor between this LED). pin and GND; a resistor in series with the capacitor is
TG (Pin 3):
Top Gate Driver Output. An inverted PWM signal recommended for fast transient response. Do not leave drives series PMOS device between VISP and (VISP – 7V) this pin open. if VISP > 7V. An internal 7V clamp protects the PMOS gate by limiting VGS. Leave TG unconnected if not used.
CTRL (Pin 9):
Current Sense Threshold Adjustment Pin. Regulating threshold V(ISP-ISN) is 0.25 • VCTRL plus an offset
GND (Pins 4, 17, 21, 22, Exposed Pad Pin 29):
Ground. for 0.1V < VCTRL < 1V. For VCTRL > 1.2V the current sense These pins also serve as current sense input for control threshold is constant at the full-scale value of 250mV. For loop, sensing negative terminal of current sense resistor in 1V < VCTRL < 1.2V, the dependence of the current sense the source of the N-channel MOSFET. Solder the exposed threshold upon VCTRL transitions from a linear function pad directly to ground plane. to a constant value, reaching 98% of full-scale value by
ISMON (Pin 5):
ISP/ISN Current Report Pin. The LED VCTRL = 1.1V. Connect CTRL to VREF for the 250mV default current sensed by ISP/ISN inputs is reported as V current threshold. Do not leave this pin open. Pull CTRL ISMON = I pin to GND for zero LED current. LED • RLED • 4. Leave ISMON pin unconnected if not used. When PWM is low, ISMON is driven to ground. Bypass
VREF (Pin 10):
Voltage Reference Output Pin. Typically with a 47nF capacitor or higher if needed. 2.015V. This pin drives a resistor divider for the CTRL
FB2 (Pin 6):
Voltage Loop Feedback 2 Pin. This pin is pin, either for analog dimming or for temperature limit/ connected to the internal transconductance amplifier posi- compensation of LED load. It can supply up to 100μA. tive input node. The internal transconductance amplifier
SS (Pin 11):
Soft-Start Pin. This pin modulates oscillator with output VC regulates FB2 to 1.25V through the DC/ frequency and compensation pin voltage (VC) clamp. The DC converter. On LT3796 only, the FB2 has an additional soft-start interval is set with an external capacitor. The pin feature. If FB2 is driven above 1.3V, the TG pin is pulled has a 28μA (typical) pull-up current source to an internal high to turn off the external PMOS and GATE pin is driven 2.5V rail. This pin can be used as fault timer. Provided the to GND to turn off the external N-channel MOSFET. Connect SS pin has exceeded 1.7V, the pull-up current source is to GND if not used. disabled and a 2.8µA pull-down current enabled when any
FB1 (Pin 7):
Voltage Loop Feedback 1 Pin. FB1 is intended one of the following fault conditions happen: for constant-voltage regulation or for LED protection/open 1. LED overcurrent LED detection. The internal transconductance amplifier 2. INTVCC undervoltage with output VC regulates FB1 to 1.25V (nominal) through 3. Thermal limit the DC/DC converter. If the FB1 input is regulating the loop and V The SS pin must be discharged below 0.2V to reinitiate a (ISP-ISN) is less than 25mV (normal), the VMODE pull-down is asserted. This action may signal an open soft-start cycle. Switching is disabled until SS is recharged. LED fault. If FB1 is driven above the 1.3V (by an external
RT (Pin 12):
Switching Frequency Adjustment Pin. Set the power supply spike, for example), the FAULT pull-down is frequency using a resistor to GND (for resistor values, see asserted, the GATE pin is pulled low to turn off the external the Typical Performance curve or Table 2). Do not leave N-channel MOSFET and the TG pin is driven high to protect the RT pin open. the LEDs from an overcurrent event. Do not leave the FB1 pin open. If not used, connect FB1 to GND. 3796fb 10 For more information www.linear.com/3796 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
