Datasheet ADP5065 (Analog Devices) - 5

ManufacturerAnalog Devices
DescriptionFast Charge Battery Management with Power Path and USB Compatibility
Pages / Page40 / 5 — Data Sheet. ADP5065. Parameter. Symbol. Min. Typ. Max. Unit. Test …
RevisionD
File Format / SizePDF / 981 Kb
Document LanguageEnglish

Data Sheet. ADP5065. Parameter. Symbol. Min. Typ. Max. Unit. Test Conditions/Comments. RECOMMENDED INPUT AND OUTPUT CAPACITANCE

Data Sheet ADP5065 Parameter Symbol Min Typ Max Unit Test Conditions/Comments RECOMMENDED INPUT AND OUTPUT CAPACITANCE

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Data Sheet ADP5065 Parameter Symbol Min Typ Max Unit Test Conditions/Comments
BATTERY DETECTION Sink Current ISINK 13 20 34 mA Source Current ISOURCE 7 10 13 mA Battery Threshold Low VBATL 1.8 1.9 2.0 V High VBATH 3.4 V No Battery Threshold VNOBAT 3.3 V VTRM ≥ 3.7 V, valid after charge complete (see Figure 38) 3.0 V VTRM < 3.7 V, valid after charge complete (see Figure 38) Battery Detection Timer tBATOK 333 ms TIMERS Start Charging Delay Timer tSTART 1 sec Trickle Charge Timer tTRK 60 min Fast Charge Timer tCHG 600 min Charge Complete Timer tEND 7.5 min VBAT_SNS = VTRM, ICHG < IEND Deglitch Timer tDG 31 ms Applies to VTRK, VRCH, IEND, VDEAD, VVIN_OK Watchdog Timer1 tWD 32 sec Safety Timer tSAFE 36 40 44 min Battery Node Short Timer1 tBAT_SHR 30 sec LOGIC INPUTS Maximum Voltage on Digital Inputs VDIN_MAX 5.5 V Maximum Logic Low Input Voltage VIL 0.5 V Applies to SCL, SDA, TRK_EXT, IIN_EXT Minimum Logic High Input Voltage VIH 1.2 V Applies to SCL, SDA, TRK_EXT, IIN_EXT Pull-Down Resistance 215 350 610 kΩ Applies to TRK_EXT, IIN_EXT 1 These values are programmable via I2C. Values are given with default register values. 2 The output current during charging can be limited by IBUS or by the isothermal charging mode. 3 Programmable via external resistor programming, if required. 4 JEITA can be enabled or disabled in I2C.
RECOMMENDED INPUT AND OUTPUT CAPACITANCE Table 2. Parameter Min Typ Max Unit Test Conditions/Comments
CAPACITANCE VINx Capacitance 1.0 µF Effective capacitance CFILT Pin Total External Capacitance 2.0 4.7 5.0 μF Effective capacitance ISO_Sx Pin Total Capacitance 10 50 µF Effective capacitance ISO_Bx Pin Total Capacitance 10 µF Effective capacitance Rev. D | Page 5 of 40 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Recommended Input and Output Capacitance I2C-Compatible Interface Timing Specifications Timing Diagram Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Temperature Characteristics Typical Waveforms Theory of Operation Introduction Charger Modes Input Current Limit USB Compatibility Trickle Charge Mode Trickle Charge Mode Timer Weak Charge Mode (Constant Current) Fast Charge Mode (Constant Current) Fast Charge Mode (Constant Voltage) Fast Charge Mode Timer Watchdog Timer Safety Timer Charge Complete Recharge Battery Charging Enable/Disable Thermal Management Isothermal Charging Thermal Shutdown and Thermal Early Warning Fault Recovery Battery Isolation FET Battery Detection Battery Level Detection Battery (ISO_Bx) Short Detection Battery Pack Temperature Sensing Battery Thermistor Input JEITA Li-Ion Battery Temperature Charging Specification External Resistor for V_WEAK_SET I2C Interface Charger Operational Flowchart I2C Register Map Register Bit Descriptions Applications Information External Components Inductor Selection ISO_Sx (VOUT) and ISO_Bx Capacitor Selection VINx Capacitor Selection CFILT Capacitor Selection PCB Layout Guidelines Power Dissipation and Thermal Considerations Charger Power Dissipation Junction Temperature Factory-Programmable Options Packaging and Ordering Information Outline Dimensions Ordering Guide