Datasheet LT1513, LT1513-2 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | SEPIC Constant- or Programmable-Current/Constant-Voltage Battery Charger |
| Pages / Page | 16 / 7 — APPLICATIONS INFORMATION. Figure 3. Eliminating Divider Current. Maximum … |
| File Format / Size | PDF / 220 Kb |
| Document Language | English |
APPLICATIONS INFORMATION. Figure 3. Eliminating Divider Current. Maximum Input Voltage. Shutdown and Synchronization
Model Line for this Datasheet
Text Version of Document
LT1513/LT1513-2
U U W U APPLICATIONS INFORMATION
The LT1513 is an IC battery charger chip specifically opti- Figure 3. D2, C6 and R6 form a peak detector to drive the gate mized to use the SEPIC converter topology. A complete of the FET to about the same as the battery voltage. If power charger schematic is shown in Figure 1. The SEPIC topology is turned off, the gate will drop to 0V and the only drain on the has unique advantages for battery charging. It will operate battery will be the reverse leakage of the catch diode D1. See with input voltages above, equal to or below the battery Diode Selection for a discussion of diode leakage. voltage, has no path for battery discharge when turned off, and eliminates the snubber losses of flyback designs. It also C2 L1A D1 ADAPTER has a current sense point that is ground referred and need INPUT not be connected directly to the battery. The two inductors V R1 IN D2 VSW shown are actually just two identical windings on one L1B + LT1513 inductor core, although two separate inductors can be used. C1 VFB A current sense voltage is generated with respect to ground GND C6 R6 across R3 in Figure 1. The average current through R3 is R3 R2 470pF 470k always identical to the current delivered to the battery. The 1513 F03 LT1513 current limit loop will servo the voltage across R3 SCHEMATIC SIMPLIFIED FOR CLARITY D2 = 1N914, 1N4148 OR EQUIVALENT to – 100mV when the battery voltage is below the voltage limit set by the output divider R1/R2. Constant-current
Figure 3. Eliminating Divider Current
charging is therefore set at 100mV/R3. R4 and C4 filter the current signal to deliver a smooth feedback voltage to the IFB
Maximum Input Voltage
pin. R1 and R2 form a divider for battery voltage sensing and set the battery float voltage. The suggested value for R2 is Maximum input voltage for the LT1513 is partly determined 12.4k. R1 is calculated from: by battery voltage. A SEPIC converter has a maximum switch voltage equal to input voltage plus output voltage. R2 V ( – 1 245 . ) R BAT 1= The LT1513 has a maximum input voltage of 30V and a 1 245 . + R2 0 ( 3 . A µ ) maximum switch voltage of 40V, so this limits maximum VBAT = battery float voltage input voltage to 30V, or 40V – VBAT, whichever is less. 0.3µA = typical FB pin bias current
Shutdown and Synchronization
A value of 12.4k for R2 sets divider current at 100µA. This is a constant drain on the battery when power to the charger is The dual function S/S pin provides easy shutdown and off. If this drain is too high, R2 can be increased to 41.2k, synchronization. It is logic level compatible and can be reducing divider current to 30µA. This introduces an addi- pulled high or left floating for normal operation. A logic low tional uncorrectable error to the constant voltage float mode on the S/S pin activates shutdown, reducing input supply of about ±0.5% as calculated by: current to 12µA. To synchronize switching, drive the S/S pin ± between 600kHz and 800kHz. 0.15 A(R1)(R2) µ V Error = BAT 1.245(R1+ R2)
Inductor Selection
±0.15µA = expected variation in FB bias current around the L1A and L1B are normally just two identical windings on one nominal 0.3µA typical value. core, although two separate inductors can be used. A typical value is 10µH, which gives about 0.5A peak-to-peak induc- With R2 = 41.2k and R1 = 228k, (VBAT = 8.2V), the error due tor current. Lower values will give higher ripple current, to variations in bias current would be ±0.42%. which reduces maximum charging current. 5µH can be used A second option is to disconnect the divider when charger if charging currents are at least 20% lower than the values power is off. This can be done with a small NFET as shown in sn1513 1513fas 7
U U W U APPLICATIONS INFORMATION
The LT1513 is an IC battery charger chip specifically opti- Figure 3. D2, C6 and R6 form a peak detector to drive the gate mized to use the SEPIC converter topology. A complete of the FET to about the same as the battery voltage. If power charger schematic is shown in Figure 1. The SEPIC topology is turned off, the gate will drop to 0V and the only drain on the has unique advantages for battery charging. It will operate battery will be the reverse leakage of the catch diode D1. See with input voltages above, equal to or below the battery Diode Selection for a discussion of diode leakage. voltage, has no path for battery discharge when turned off, and eliminates the snubber losses of flyback designs. It also C2 L1A D1 ADAPTER has a current sense point that is ground referred and need INPUT not be connected directly to the battery. The two inductors V R1 IN D2 VSW shown are actually just two identical windings on one L1B + LT1513 inductor core, although two separate inductors can be used. C1 VFB A current sense voltage is generated with respect to ground GND C6 R6 across R3 in Figure 1. The average current through R3 is R3 R2 470pF 470k always identical to the current delivered to the battery. The 1513 F03 LT1513 current limit loop will servo the voltage across R3 SCHEMATIC SIMPLIFIED FOR CLARITY D2 = 1N914, 1N4148 OR EQUIVALENT to – 100mV when the battery voltage is below the voltage limit set by the output divider R1/R2. Constant-current
Figure 3. Eliminating Divider Current
charging is therefore set at 100mV/R3. R4 and C4 filter the current signal to deliver a smooth feedback voltage to the IFB
Maximum Input Voltage
pin. R1 and R2 form a divider for battery voltage sensing and set the battery float voltage. The suggested value for R2 is Maximum input voltage for the LT1513 is partly determined 12.4k. R1 is calculated from: by battery voltage. A SEPIC converter has a maximum switch voltage equal to input voltage plus output voltage. R2 V ( – 1 245 . ) R BAT 1= The LT1513 has a maximum input voltage of 30V and a 1 245 . + R2 0 ( 3 . A µ ) maximum switch voltage of 40V, so this limits maximum VBAT = battery float voltage input voltage to 30V, or 40V – VBAT, whichever is less. 0.3µA = typical FB pin bias current
Shutdown and Synchronization
A value of 12.4k for R2 sets divider current at 100µA. This is a constant drain on the battery when power to the charger is The dual function S/S pin provides easy shutdown and off. If this drain is too high, R2 can be increased to 41.2k, synchronization. It is logic level compatible and can be reducing divider current to 30µA. This introduces an addi- pulled high or left floating for normal operation. A logic low tional uncorrectable error to the constant voltage float mode on the S/S pin activates shutdown, reducing input supply of about ±0.5% as calculated by: current to 12µA. To synchronize switching, drive the S/S pin ± between 600kHz and 800kHz. 0.15 A(R1)(R2) µ V Error = BAT 1.245(R1+ R2)
Inductor Selection
±0.15µA = expected variation in FB bias current around the L1A and L1B are normally just two identical windings on one nominal 0.3µA typical value. core, although two separate inductors can be used. A typical value is 10µH, which gives about 0.5A peak-to-peak induc- With R2 = 41.2k and R1 = 228k, (VBAT = 8.2V), the error due tor current. Lower values will give higher ripple current, to variations in bias current would be ±0.42%. which reduces maximum charging current. 5µH can be used A second option is to disconnect the divider when charger if charging currents are at least 20% lower than the values power is off. This can be done with a small NFET as shown in sn1513 1513fas 7
