Datasheet LTC3638 (Analog Devices) - 6

ManufacturerAnalog Devices
DescriptionHigh Efficiency, 140V 250mA Step-Down Regulator
Pages / Page26 / 6 — PIN FUNCTIONS SW (Pin 1):. ISET (Pin 11):. IN (Pin 3):. FBO (Pin 5):. …
File Format / SizePDF / 624 Kb
Document LanguageEnglish

PIN FUNCTIONS SW (Pin 1):. ISET (Pin 11):. IN (Pin 3):. FBO (Pin 5):. VPRG2, VPRG1 (Pins 6, 7):. OVLO (Pin 12):

PIN FUNCTIONS SW (Pin 1): ISET (Pin 11): IN (Pin 3): FBO (Pin 5): VPRG2, VPRG1 (Pins 6, 7): OVLO (Pin 12):

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LTC3638
PIN FUNCTIONS SW (Pin 1):
Switch Node Connection to Inductor and
ISET (Pin 11):
Peak Current Set Input. A resistor from this Catch Diode Cathode. This pin connects to the drain of pin to ground sets the peak current comparator threshold. the internal power MOSFET switch. Leave floating for the maximum peak current (575mA
V
typical) or short to ground for minimum peak current
IN (Pin 3):
Main Supply Pin. A ceramic bypass capacitor should be tied between this pin and GND. (60mA typical). The maximum output current is one-half the peak current. The 5µA current that is sourced out of
FBO (Pin 5):
Feedback Comparator Output. Connect to the this pin when switching is reduced to 1µA in sleep. Op- VFB pins of additional LTC3638s to combine the output tionally, a capacitor can be placed from this pin to GND current. The typical pull-up current is 20µA. The typical pull- to trade off efficiency for light load output voltage ripple. down impedance is 70Ω. See Applications Information. See Applications Information.
VPRG2, VPRG1 (Pins 6, 7):
Output Voltage Selection. Short
OVLO (Pin 12):
Overvoltage Lockout Input. Connect to both pins to ground for a resistive divider programmable the input supply through a resistor divider to set the over- output voltage. Short VPRG1 to SS and short VPRG2 to voltage lockout level. A voltage on this pin above 1.21V ground for a 5V output voltage. Short VPRG1 to ground disables the internal MOSFET switch. Normal operation and short VPRG2 to SS for a 3.3V output voltage. Short resumes when the voltage on this pin decreases below both pins to SS for a 1.8V output voltage. 1.10V. Exceeding the OVLO lockout threshold triggers a
GND (Pin 8, 16, Exposed Pad Pin 17):
Ground. The ex- soft-start reset, resulting in a graceful recovery from an posed pad must be soldered to the PCB ground plane for input supply transient. Tie this pin to ground if the over- rated thermal performance. voltage is not used.
V RUN (Pin 14):
Run Control Input. A voltage on this pin
FB (Pin 9):
Output Voltage Feedback. When configured for an adjustable output voltage, connect to an external above 1.21V enables normal operation. Forcing this pin resistive divider to divide the output voltage down for below 0.7V shuts down the LTC3638, reducing quiescent comparison to the 0.8V reference. For the fixed output current to approximately 1.4µA. Optionally, connect to the configuration, directly connect this pin to the output. input supply through a resistor divider to set the under- voltage lockout.
SS (Pin 10):
Soft-Start Control Input. A capacitor to ground at this pin sets the output voltage ramp time. A 50µA current initially charges the soft-start capacitor until switching begins, at which time the current is reduced to its nominal value of 5µA. The output voltage ramp time from zero to its regulated value is 1ms for every 6.25nF of capacitance from SS to GND. If left floating, the ramp time defaults to an internal 1ms soft-start. 3638fa 6 For more information www.linear.com/LTC3638 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts