Datasheet LTC3857 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | Low IQ, Dual, 2-Phase Synchronous Step-Down Controller |
| Pages / Page | 38 / 8 — PIN FUNCTIONS. SENSE1–, SENSE2– (Pin 1, Pin 9):. SGND (Pin 6, Exposed Pad … |
| File Format / Size | PDF / 453 Kb |
| Document Language | English |
PIN FUNCTIONS. SENSE1–, SENSE2– (Pin 1, Pin 9):. SGND (Pin 6, Exposed Pad Pin 33):. FREQ (Pin 2):. RUN1, RUN2 (Pin 7, Pin 8):
Model Line for this Datasheet
Text Version of Document
LTC3857
PIN FUNCTIONS SENSE1–, SENSE2– (Pin 1, Pin 9):
The (–) Input to the
SGND (Pin 6, Exposed Pad Pin 33):
Small-signal ground Differential Current Comparators. When greater than common to both controllers, must be routed separately INTVCC – 0.5V, the SENSE– pin supplies current to the from high current grounds to the common (–) terminals current comparator. of the CIN capacitors. The exposed pad must be soldered to the PCB for rated thermal performance.
FREQ (Pin 2):
The frequency control pin for the internal VCO. Connecting the pin to GND forces the VCO to a fixed
RUN1, RUN2 (Pin 7, Pin 8):
Digital Run Control Inputs for low frequency of 350kHz. Connecting the pin to INTVCC Each Controller. Forcing either of these pins below 1.26V forces the VCO to a fixed high frequency of 535kHz. shuts down that controller. Forcing both of these pins below Other frequencies between 50kHz and 900kHz can be 0.7V shuts down the entire LTC3857, reducing quiescent programmed using a resistor between FREQ and GND. current to approximately 8μA. Do not float these pins. An internal 20μA pull-up current develops the voltage to
INTV
be used by the VCO to control the frequency
CC (Pin 19):
Output of the Internal Linear Low Dropout Regulator. The driver and control circuits are powered from
PHASMD (Pin 3):
Control Input to Phase Selector which this voltage source. Must be decoupled to power ground determines the phase relationships between control- with a minimum of 4.7μF ceramic or other low ESR ca- ler 1, controller 2 and the CLKOUT signal. Pulling this pacitor. Do not use the INTVCC pin for any other purpose. pin to ground forces TG2 and CLKOUT to be out of phase
EXTV
180° and 60° with respect to TG1. Connecting this pin to
CC (Pin 20):
External Power Input to an Internal LDO Connected to INTV INTV CC. This LDO supplies INTVCC power, CC forces TG2 and CLKOUT to be out of phase 240° bypassing the internal LDO powered from V and 120° with respect to TG1. Floating this pin forces TG2 IN whenever EXTV and CLKOUT to be out of phase 180° and 90° with respect CC is higher than 4.7V. See EXTVCC Connection in the Applications Information section. Do not exceed 14V to TG1. Refer to Table 1. on this pin.
CLKOUT (Pin 4):
Output clock signal available to daisy-
PGND (Pin 21):
Driver Power Ground. Connects to the chain other controller ICs for additional MOSFET driver sources of bottom (synchronous) N-channel MOSFETs stages/phases. The output levels swing from INTVCC to and the (–) terminal(s) of C ground. IN.
V PLLIN/MODE (Pin 5):
External Synchronization Input to
IN (Pin 22):
Main Supply Pin. A bypass capacitor should be tied between this pin and the signal ground pin. Phase Detector and Forced Continuous Mode Input. When an external clock is applied to this pin, the phase-locked
BG1, BG2 (Pin 23, Pin 18):
High Current Gate Drives loop will force the rising TG1 signal to be synchronized for Bottom (Synchronous) N-Channel MOSFETs. Voltage with the rising edge of the external clock. When not syn- swing at these pins is from ground to INTVCC. chronizing to an external clock, this input, which acts on
BOOST1, BOOST2 (Pin 24, Pin 17):
Bootstrapped Supplies both controllers, determines how the LTC3857 operates to the Topside Floating Drivers. Capacitors are connected at light loads. Pulling this pin to ground selects Burst between the BOOST and SW pins and Schottky diodes are Mode operation. An internal 100k resistor to ground also tied between the BOOST and INTVCC pins. Voltage swing invokes Burst Mode operation when the pin is floated. at the BOOST pins is from INTVCC to (VIN + INTVCC). Tying this pin to INTVCC forces continuous inductor current operation. Tying this pin to a voltage greater than 1.2V and
SW1, SW2 (Pin 25, Pin 16):
Switch Node Connections less than INTV to Inductors. CC – 1.3V selects pulse-skipping operation. This can be done by adding a 100k resistor between the PLLIN/MODE pin and INTVCC. 3857fd 8 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS FUNCTIONAL DIAGRAM OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION REVISION HISTORY TYPICAL APPLICATION RELATED PARTS
PIN FUNCTIONS SENSE1–, SENSE2– (Pin 1, Pin 9):
The (–) Input to the
SGND (Pin 6, Exposed Pad Pin 33):
Small-signal ground Differential Current Comparators. When greater than common to both controllers, must be routed separately INTVCC – 0.5V, the SENSE– pin supplies current to the from high current grounds to the common (–) terminals current comparator. of the CIN capacitors. The exposed pad must be soldered to the PCB for rated thermal performance.
FREQ (Pin 2):
The frequency control pin for the internal VCO. Connecting the pin to GND forces the VCO to a fixed
RUN1, RUN2 (Pin 7, Pin 8):
Digital Run Control Inputs for low frequency of 350kHz. Connecting the pin to INTVCC Each Controller. Forcing either of these pins below 1.26V forces the VCO to a fixed high frequency of 535kHz. shuts down that controller. Forcing both of these pins below Other frequencies between 50kHz and 900kHz can be 0.7V shuts down the entire LTC3857, reducing quiescent programmed using a resistor between FREQ and GND. current to approximately 8μA. Do not float these pins. An internal 20μA pull-up current develops the voltage to
INTV
be used by the VCO to control the frequency
CC (Pin 19):
Output of the Internal Linear Low Dropout Regulator. The driver and control circuits are powered from
PHASMD (Pin 3):
Control Input to Phase Selector which this voltage source. Must be decoupled to power ground determines the phase relationships between control- with a minimum of 4.7μF ceramic or other low ESR ca- ler 1, controller 2 and the CLKOUT signal. Pulling this pacitor. Do not use the INTVCC pin for any other purpose. pin to ground forces TG2 and CLKOUT to be out of phase
EXTV
180° and 60° with respect to TG1. Connecting this pin to
CC (Pin 20):
External Power Input to an Internal LDO Connected to INTV INTV CC. This LDO supplies INTVCC power, CC forces TG2 and CLKOUT to be out of phase 240° bypassing the internal LDO powered from V and 120° with respect to TG1. Floating this pin forces TG2 IN whenever EXTV and CLKOUT to be out of phase 180° and 90° with respect CC is higher than 4.7V. See EXTVCC Connection in the Applications Information section. Do not exceed 14V to TG1. Refer to Table 1. on this pin.
CLKOUT (Pin 4):
Output clock signal available to daisy-
PGND (Pin 21):
Driver Power Ground. Connects to the chain other controller ICs for additional MOSFET driver sources of bottom (synchronous) N-channel MOSFETs stages/phases. The output levels swing from INTVCC to and the (–) terminal(s) of C ground. IN.
V PLLIN/MODE (Pin 5):
External Synchronization Input to
IN (Pin 22):
Main Supply Pin. A bypass capacitor should be tied between this pin and the signal ground pin. Phase Detector and Forced Continuous Mode Input. When an external clock is applied to this pin, the phase-locked
BG1, BG2 (Pin 23, Pin 18):
High Current Gate Drives loop will force the rising TG1 signal to be synchronized for Bottom (Synchronous) N-Channel MOSFETs. Voltage with the rising edge of the external clock. When not syn- swing at these pins is from ground to INTVCC. chronizing to an external clock, this input, which acts on
BOOST1, BOOST2 (Pin 24, Pin 17):
Bootstrapped Supplies both controllers, determines how the LTC3857 operates to the Topside Floating Drivers. Capacitors are connected at light loads. Pulling this pin to ground selects Burst between the BOOST and SW pins and Schottky diodes are Mode operation. An internal 100k resistor to ground also tied between the BOOST and INTVCC pins. Voltage swing invokes Burst Mode operation when the pin is floated. at the BOOST pins is from INTVCC to (VIN + INTVCC). Tying this pin to INTVCC forces continuous inductor current operation. Tying this pin to a voltage greater than 1.2V and
SW1, SW2 (Pin 25, Pin 16):
Switch Node Connections less than INTV to Inductors. CC – 1.3V selects pulse-skipping operation. This can be done by adding a 100k resistor between the PLLIN/MODE pin and INTVCC. 3857fd 8 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS FUNCTIONAL DIAGRAM OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION REVISION HISTORY TYPICAL APPLICATION RELATED PARTS
