Datasheet LT3724 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | High Voltage, Current Mode Switching Regulator Controller |
| Pages / Page | 26 / 7 — PIN FUNCTIONS VCC (Pin 12):. TG (Pin 15):. BOOST (Pin 16):. NC (Pin 13):. … |
| File Format / Size | PDF / 322 Kb |
| Document Language | English |
PIN FUNCTIONS VCC (Pin 12):. TG (Pin 15):. BOOST (Pin 16):. NC (Pin 13):. SW (Pin 14):. Exposed Pad (SGND) (Pin 17):
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Text Version of Document
LT3724
PIN FUNCTIONS VCC (Pin 12):
The VCC pin is the internal bias supply so that the BOOST pin capacitor can be charged. Give decoupling node. Use a low ESR 1µF ceramic capacitor careful consideration in choosing the Schottky diode to to decouple this node to PGND. Most internal IC func- limit the negative voltage swing on the SW pin. tions are powered from this bias supply. An external diode connected from V
TG (Pin 15):
The TG pin is the bootstrapped gate drive CC to the BOOST pin charges the bootstrapped capacitor during the off-time of the main for the top N-Channel MOSFET. Since very fast high cur- power switch. Back driving the V rents are driven from this pin, connect it to the gate of CC pin from an external DC voltage source, such as the V the power MOSFET with a short and wide, typically 0.02” OUT output of the buck regulator supply, increases overall efficiency and reduces width, PCB trace to minimize inductance. power dissipation in the IC. In shutdown mode this pin
BOOST (Pin 16):
The BOOST pin is the supply for the sinks 20µA until the pin voltage is discharged to 0V. bootstrapped gate drive and is externally connected to a
NC (Pin 13):
No Connection. low ESR ceramic boost capacitor referenced to SW pin. The recommended value of the BOOST capacitor, C
SW (Pin 14):
In step-down applications the SW pin is BOOST, is 50 times greater than the total input capacitance of the connected to the cathode of an external clamping Schottky topside MOSFET. In most applications 0.1µF is adequate. diode, the source of the power MOSFET and the induc- The maximum voltage that this pin sees is V tor. The SW node voltage swing is from V IN + VCC, IN during the ground referred. on-time of the power MOSFET, to a Schottky voltage drop below ground during the off-time of the power MOSFET.
Exposed Pad (SGND) (Pin 17):
The exposed leadframe is In start-up and in operating modes where there is insuf- internally connected to the SGND pin. Solder the exposed ficient inductor current to freewheel the Schottky diode, an pad to the PCB ground for electrical contact and optimal internal switch is turned on to pull the SW pin to ground thermal performance. 3724fd 7
PIN FUNCTIONS VCC (Pin 12):
The VCC pin is the internal bias supply so that the BOOST pin capacitor can be charged. Give decoupling node. Use a low ESR 1µF ceramic capacitor careful consideration in choosing the Schottky diode to to decouple this node to PGND. Most internal IC func- limit the negative voltage swing on the SW pin. tions are powered from this bias supply. An external diode connected from V
TG (Pin 15):
The TG pin is the bootstrapped gate drive CC to the BOOST pin charges the bootstrapped capacitor during the off-time of the main for the top N-Channel MOSFET. Since very fast high cur- power switch. Back driving the V rents are driven from this pin, connect it to the gate of CC pin from an external DC voltage source, such as the V the power MOSFET with a short and wide, typically 0.02” OUT output of the buck regulator supply, increases overall efficiency and reduces width, PCB trace to minimize inductance. power dissipation in the IC. In shutdown mode this pin
BOOST (Pin 16):
The BOOST pin is the supply for the sinks 20µA until the pin voltage is discharged to 0V. bootstrapped gate drive and is externally connected to a
NC (Pin 13):
No Connection. low ESR ceramic boost capacitor referenced to SW pin. The recommended value of the BOOST capacitor, C
SW (Pin 14):
In step-down applications the SW pin is BOOST, is 50 times greater than the total input capacitance of the connected to the cathode of an external clamping Schottky topside MOSFET. In most applications 0.1µF is adequate. diode, the source of the power MOSFET and the induc- The maximum voltage that this pin sees is V tor. The SW node voltage swing is from V IN + VCC, IN during the ground referred. on-time of the power MOSFET, to a Schottky voltage drop below ground during the off-time of the power MOSFET.
Exposed Pad (SGND) (Pin 17):
The exposed leadframe is In start-up and in operating modes where there is insuf- internally connected to the SGND pin. Solder the exposed ficient inductor current to freewheel the Schottky diode, an pad to the PCB ground for electrical contact and optimal internal switch is turned on to pull the SW pin to ground thermal performance. 3724fd 7
